中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

21 records (took 0.01 seconds)

    METHOD AND SYSTEM FOR IMPLEMENTING INTERCONNECTION FAULT TOLERANCE BETWEEN CPU
    2.
    发明申请
    METHOD AND SYSTEM FOR IMPLEMENTING INTERCONNECTION FAULT TOLERANCE BETWEEN CPU 有权
    执行CPU间互连故障容限的方法和系统

    公开(公告)号：US20130097455A1

    公开(公告)日：2013-04-18

    申请号：US13707188

    申请日：2012-12-06

    Applicant: Huawei Technologies Co., Ltd.

    Inventor： Sheng Chang ,  Haibin Wang ,  Jie Zhang ,  Rongyu Yang ,  Xinyu Hou

    IPC: G06F11/20

    CPC classification number: G06F11/2005 ,  G06F11/0724 ,  G06F11/0745 ,  G06F11/0784 ,  G06F11/1443

    Abstract: A system for implementing interconnection fault tolerance between CPUs, a first CPU and a second CPU implements interconnection through a first CPU interconnect device and a second CPU interconnect device. The system adds a data channel between a first SerDes interface of the first CPU interconnect device and a second SerDes interface of the second CPU interconnect device, and transmits link connection state information and a link control signal through the added data channel. The system monitors a link state of any one link in a CPU interconnection system, transmits the link state through the added data channel, recovers any one of the connection links when determining whether any one of the first connection link, the second connection link and the third connection link is faulty.

    Abstract translation: 用于实现CPU之间的互连容错的系统，第一CPU和第二CPU通过第一CPU互连设备和第二CPU互连设备实现互连。 该系统在第一CPU互连设备的第一SerDes接口和第二CPU互连设备的第二SerDes接口之间添加数据信道，并通过添加的数据信道发送链路连接状态信息和链路控制信号。 系统监视CPU互连系统中任一链路的链路状态，通过添加的数据信道发送链路状态，在确定第一连接链路，第二连接链路和 第三连接链路故障。

    COMPUTER SUBSYSTEM AND COMPUTER SYSTEM WITH COMPOSITE NODES IN AN INTERCONNECTION STRUCTURE
    4.
    发明申请
    COMPUTER SUBSYSTEM AND COMPUTER SYSTEM WITH COMPOSITE NODES IN AN INTERCONNECTION STRUCTURE 审中-公开
    计算机子系统与计算机系统与互连结构中的复合节点

    公开(公告)号：US20160328357A1

    公开(公告)日：2016-11-10

    申请号：US15150419

    申请日：2016-05-09

    Applicant: HUAWEI TECHNOLOGIES CO.,LTD.

    Inventor： Jiangen Liu ,  Chenghong He ,  Haibin Wang ,  Xinyu Hou

    IPC: G06F15/80 ,  G06F13/42

    CPC classification number: G06F15/80 ,  G06F13/4221 ,  G06F15/167 ,  G06F15/17337

    Abstract: The present invention provides a computer subsystem and a computer system. The computer subsystem includes L composite nodes, each composite node includes M basic nodes, each basic node includes N central processing units (CPUs) and one node controller. Any two CPUs in each basic node are interconnected. Each CPU in each basic node is connected to the node controller in the basic node. The node controller in each basic node has a routing function. Any two node controllers in the M basic nodes are interconnected. A connection between the L composite nodes formed through connections between node controllers enables communication between any two node controllers to be no more than three hops. The computer subsystem and the computer system according to embodiments of the present invention can reduce the kinds and the number of interconnection chips, and simplify an interconnection structure of a system, thereby improving reliability of the system.

    Abstract translation: 本发明提供一种计算机子系统和计算机系统。 计算机子系统包括L个复合节点，每个复合节点包括M个基本节点，每个基本节点包括N个中央处理单元（CPU）和一个节点控制器。 每个基本节点中的任何两个CPU都是互连的。 每个基本节点中的每个CPU都连接到基本节点中的节点控制器。 每个基本节点中的节点控制器具有路由功能。 M个基本节点中的任何两个节点控制器互连。 通过节点控制器之间的连接形成的L个复合节点之间的连接使得任何两个节点控制器之间的通信不超过三跳。 根据本发明的实施例的计算机子系统和计算机系统可以减少互连芯片的种类和数量，并且简化系统的互连结构，从而提高系统的可靠性。

    Data transmission method, device and system
    5.
    发明授权
    Data transmission method, device and system 有权
    数据传输方式，设备和系统

    公开(公告)号：US09148264B2

    公开(公告)日：2015-09-29

    申请号：US14502326

    申请日：2014-09-30

    Applicant: Huawei Technologies Co., Ltd.

    Inventor： Xinyu Hou ,  Sheng Chang ,  Rongyu Yang ,  Guang Lu

    IPC: H04L1/24 ,  H04L1/18 ,  H04L1/20 ,  G06F11/07 ,  G06F11/263 ,  H04L1/08

    CPC classification number: H04L1/24 ,  G06F11/076 ,  G06F11/263 ,  H04L1/0045 ,  H04L1/0061 ,  H04L1/08 ,  H04L1/1635 ,  H04L1/18 ,  H04L1/1825 ,  H04L1/1874 ,  H04L1/20 ,  H04L1/203 ,  H04L1/244

    Abstract: A data transmission method, device and system to improve reliability of a data link. When the sender side detects erroneous data, the erroneous data is discarded and a data retransmission request is sent to the sender side to ensure correctness of received data and improve reliability of the data link; and, when the sender side detects the erroneous data and a bit error rate is greater than a preset bit error rate threshold, the data link gets into auto recovery, and data transmission is resumed after the recovery succeeds, thereby avoiding an excessively high bit error rate, preventing an excessively high probability of omitted checks (the higher the bit error rate is, the higher probability of omitted checks is), and further improving reliability of the data link.

    Abstract translation: 一种提高数据链路可靠性的数据传输方法，设备和系统。 当发送方检测到错误数据时，丢弃错误数据，并向发送方发送数据重发请求，以确保接收到的数据的正确性并提高数据链路的可靠性; 并且当发送方检测到错误数据并且误码率大于预设误码率阈值时，数据链路进入自动恢复，并且在恢复成功之后恢复数据传输，从而避免了过高的位错误 速率，防止忽略检查的概率过高（误码率越高，省略检查的概率越高），并进一步提高数据链路的可靠性。

    Computer subsystem and computer system with composite nodes in an interconnection structure
    8.
    发明授权
    Computer subsystem and computer system with composite nodes in an interconnection structure 有权

    公开(公告)号：US09880972B2

    公开(公告)日：2018-01-30

    申请号：US15150419

    申请日：2016-05-09

    Applicant: HUAWEI TECHNOLOGIES CO., LTD.

    Inventor： Jiangen Liu ,  Chenghong He ,  Haibin Wang ,  Xinyu Hou

    IPC: G06F9/30 ,  G06F15/80 ,  G06F15/173 ,  G06F15/167 ,  G06F13/42

    CPC classification number: G06F15/80 ,  G06F13/4221 ,  G06F15/167 ,  G06F15/17337

    Abstract: The present invention provides a computer subsystem and a computer system. The computer subsystem includes L composite nodes, each composite node includes M basic nodes, each basic node includes N central processing units (CPUs) and one node controller. Any two CPUs in each basic node are interconnected. Each CPU in each basic node is connected to the node controller in the basic node. The node controller in each basic node has a routing function. Any two node controllers in the M basic nodes are interconnected. A connection between the L composite nodes formed through connections between node controllers enables communication between any two node controllers to be no more than three hops. The computer subsystem and the computer system according to embodiments of the present invention can reduce the kinds and the number of interconnection chips, and simplify an interconnection structure of a system, thereby improving reliability of the system.

    Computer subsystem and computer system with composite nodes in an interconnection structure
    9.
    发明授权
    Computer subsystem and computer system with composite nodes in an interconnection structure 有权
    具有互连结构中复合节点的计算机子系统和计算机系统

    公开(公告)号：US09336179B2

    公开(公告)日：2016-05-10

    申请号：US13670718

    申请日：2012-11-07

    Applicant: Huawei Technologies Co., Ltd.

    Inventor： Jiangen Liu ,  Chenghong He ,  Haibin Wang ,  Xinyu Hou

    IPC: G06F9/30 ,  G06F15/173 ,  G06F15/167

    CPC classification number: G06F15/80 ,  G06F13/4221 ,  G06F15/167 ,  G06F15/17337

    Abstract: The present invention provides a computer subsystem and a computer system. The computer subsystem includes L composite nodes, each composite node includes M basic nodes, each basic node includes N central processing units CPUs and one node controller NC, where any two CPUs in each basic node are interconnected, each CPU in each basic node is connected to the NC in the basic node, the NC in each basic node has a routing function, any two NCs in the M basic nodes are interconnected, and a connection between the L composite nodes formed through a connection between NCs enable communication between any two NCs to require at most three hops. The computer subsystem and the computer system according to embodiments of the present invention can reduce the kinds and the number of interconnection chips, and simplify an interconnection structure of a system, thereby improving reliability of the system.

    Abstract translation: 本发明提供一种计算机子系统和计算机系统。 计算机子系统包括L个复合节点，每个复合节点包括M个基本节点，每个基本节点包括N个中央处理单元CPU和一个节点控制器NC，其中每个基本节点中的任何两个CPU互连，每个基本节点中的每个CPU都连接 在基本节点中的NC中，每个基本节点中的NC具有路由功能，M个基本节点中的任何两个NC互连，并且通过NC之间的连接形成的L个复合节点之间的连接使得任何两个NC之间的通信 要求最多三跳。 根据本发明的实施例的计算机子系统和计算机系统可以减少互连芯片的种类和数量，并且简化系统的互连结构，从而提高系统的可靠性。

    Transmission device and communication system for artificial intelligence chips
    10.
    发明授权
    Transmission device and communication system for artificial intelligence chips 有权

    公开(公告)号：US12259843B2

    公开(公告)日：2025-03-25

    申请号：US17561019

    申请日：2021-12-23

    Applicant: Huawei Technologies Co., Ltd.

    Inventor： Xinyu Hou ,  Qun Jia ,  Weibin Lin

    IPC: G06F13/42 ,  G06F13/40 ,  G06F15/17 ,  G06F15/173 ,  H04L49/109

    Abstract: An artificial intelligence (AI) switch chip includes a first AI interface, a first network interface, and a controller. The first AI interface is used by the AI switch chip to couple to a first AI chip in a first server. The first network interface is used by the AI switch chip to couple to a second server. The controller receives, through the first AI interface, data from the first AI chip, and then sends the data to the second server through the first network interface. By using the AI switch chip, when a server needs to send data in an AI chip to another server, an AI interface may be used to directly receive the data from the AI chip, and then the data is sent to the other server through one or more network interfaces coupled to the controller.

Patent Agency Ranking