公开(公告)号：US09059704B2

公开(公告)日：2015-06-16

申请号：US13477192

申请日：2012-05-22

申请人： Seiichi Yoneda ,  Jun Koyama ,  Yutaka Shionoiri ,  Masami Endo ,  Hiroki Dembo ,  Tatsuji Nishijima ,  Hidetomo Kobayashi ,  Kazuaki Ohshima

发明人： Seiichi Yoneda ,  Jun Koyama ,  Yutaka Shionoiri ,  Masami Endo ,  Hiroki Dembo ,  Tatsuji Nishijima ,  Hidetomo Kobayashi ,  Kazuaki Ohshima

IPC分类号： G06F1/00 ,  H03K19/177 ,  H03K19/173 ,  G06F3/06

CPC分类号： H03K19/173 ,  G06F1/3243 ,  G06F3/0679 ,  H03K19/17772 ,  Y02D10/152

摘要： An object is to provide a programmable logic device configured to keep a connection state of logic circuits even while power supply voltage is stopped. The programmable logic device includes arithmetic circuits each of whose logic state can be changed; a configuration changing circuit changing the logic states of the arithmetic circuits; a power supply control circuit controlling supply of power supply voltage to the arithmetic circuits; a state memory circuit storing data on the logic states and data on states of the power supply voltage of the arithmetic circuits; and an arithmetic state control circuit controlling the configuration changing circuit and the power supply control circuit in accordance with the data stored in the state memory circuit. A transistor in which a channel formation region is formed in an oxide semiconductor layer is provided between the configuration changing circuit and each of the arithmetic circuits.

摘要翻译： 目的是提供一种可编程逻辑器件，其被配置为即使在电源电压停止时仍保持逻辑电路的连接状态。 可编程逻辑器件包括可以改变其逻辑状态的运算电路; 配置改变电路改变运算电路的逻辑状态; 电源控制电路，控制对所述运算电路的电源电压供给; 存储关于逻辑状态的数据的状态存储电路和关于运算电路的电源电压的状态的数据; 以及算术状态控制电路，根据存储在状态存储电路中的数据控制配置改变电路和电源控制电路。 在配置改变电路和每个运算电路之间设置有在氧化物半导体层中形成沟道形成区的晶体管。

公开(公告)号：US08570065B2

公开(公告)日：2013-10-29

申请号：US13437961

申请日：2012-04-03

申请人： Hidetomo Kobayashi ,  Masami Endo ,  Yutaka Shionoiri ,  Hiroki Dembo ,  Tatsuji Nishijima ,  Kazuaki Ohshima ,  Seiichi Yoneda ,  Jun Koyama

发明人： Hidetomo Kobayashi ,  Masami Endo ,  Yutaka Shionoiri ,  Hiroki Dembo ,  Tatsuji Nishijima ,  Kazuaki Ohshima ,  Seiichi Yoneda ,  Jun Koyama

IPC分类号： H03K19/177 ,  G11C11/24

CPC分类号： H03K19/17796 ,  G11C16/0433 ,  H01L27/11803 ,  H01L27/1203

摘要： A low-power programmable LSI that can perform dynamic configuration is provided. The programmable LSI includes a plurality of logic elements. The plurality of logic elements each include a configuration memory. Each of the plurality of logic elements performs different arithmetic processing and changes an electrical connection between the logic elements, in accordance with the configuration data stored in the configuration memory. The configuration memory includes a set of a volatile storage circuit and a nonvolatile storage circuit. The nonvolatile storage circuit includes a transistor whose channel is formed in an oxide semiconductor layer and a capacitor whose one of a pair of electrodes is electrically connected to a node that is set in a floating state when the transistor is turned off.

摘要翻译： 提供了可以执行动态配置的低功耗可编程LSI。 可编程LSI包括多个逻辑元件。 多个逻辑元件各自包括配置存储器。 多个逻辑元件中的每一个执行不同的运算处理，并且根据存储在配置存储器中的配置数据改变逻辑元件之间的电连接。 配置存储器包括一组易失性存储电路和非易失性存储电路。 非易失性存储电路包括其沟道形成在氧化物半导体层中的晶体管和一对电极中的一个电极与晶体管截止时被设置为浮置状态的节点电连接的电容器。

公开(公告)号：US20120311365A1

公开(公告)日：2012-12-06

申请号：US13477192

申请日：2012-05-22

申请人： Seiichi Yoneda ,  Jun Koyama ,  Yutaka Shionoiri ,  Masami Endo ,  Hiroki Dembo ,  Tatsuji Nishijima ,  Hidetomo Kobayashi ,  Kazuaki Ohshima

发明人： Seiichi Yoneda ,  Jun Koyama ,  Yutaka Shionoiri ,  Masami Endo ,  Hiroki Dembo ,  Tatsuji Nishijima ,  Hidetomo Kobayashi ,  Kazuaki Ohshima

IPC分类号： G06F1/32

CPC分类号： H03K19/173 ,  G06F1/3243 ,  G06F3/0679 ,  H03K19/17772 ,  Y02D10/152

摘要： An object is to provide a programmable logic device configured to keep a connection state of logic circuits even while power supply voltage is stopped. The programmable logic device includes arithmetic circuits each of whose logic state can be changed; a configuration changing circuit changing the logic states of the arithmetic circuits; a power supply control circuit controlling supply of power supply voltage to the arithmetic circuits; a state memory circuit storing data on the logic states and data on states of the power supply voltage of the arithmetic circuits; and an arithmetic state control circuit controlling the configuration changing circuit and the power supply control circuit in accordance with the data stored in the state memory circuit. A transistor in which a channel formation region is formed in an oxide semiconductor layer is provided between the configuration changing circuit and each of the arithmetic circuits.

摘要翻译： 目的是提供一种可编程逻辑器件，其被配置为即使在电源电压停止时仍保持逻辑电路的连接状态。 可编程逻辑器件包括可以改变其逻辑状态的运算电路; 配置改变电路改变运算电路的逻辑状态; 电源控制电路，控制对所述运算电路的电源电压供给; 存储关于逻辑状态的数据的状态存储电路和关于运算电路的电源电压的状态的数据; 以及算术状态控制电路，根据存储在状态存储电路中的数据控制配置改变电路和电源控制电路。 在配置改变电路和每个运算电路之间设置有在氧化物半导体层中形成沟道形成区的晶体管。

公开(公告)号：US20080211561A1

公开(公告)日：2008-09-04

申请号：US12021843

申请日：2008-01-29

申请人： Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Masami Endo ,  Hiroki Dembo ,  Daisuke Kawae ,  Takayuki Inoue ,  Munehiro Kozuma

发明人： Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Masami Endo ,  Hiroki Dembo ,  Daisuke Kawae ,  Takayuki Inoue ,  Munehiro Kozuma

IPC分类号： H03K3/00

CPC分类号： G06F7/68 ,  G06F1/025 ,  G06F1/04 ,  H04L7/033

摘要： The semiconductor device is provided with a clock signal generation circuit that includes a reference clock signal generation circuit which generates a first reference clock signal, a first counter circuit which counts the number of rising edges of the first reference clock signal by using the first reference clock signal and a synchronizing signal, a second counter circuit which counts the number of rising edges of the first reference clock signal by using an enumerated value of the first counter circuit, a first divider circuit which divides a frequency of the first reference clock signal by using the enumerated value of the first counter circuit and generates a second reference clock signal, and a second divider circuit which divides a frequency of the second reference clock signal and generates a clock signal.

摘要翻译： 半导体器件设置有时钟信号产生电路，其包括产生第一参考时钟信号的参考时钟信号产生电路，第一计数器电路，通过使用第一参考时钟对第一参考时钟信号的上升沿进行计数 信号和同步信号;第二计数器电路，通过使用第一计数器电路的枚举值对第一参考时钟信号的上升沿数进行计数;第一除法器电路，其使用第一参考时钟信号的频率进行分频; 第一计数器电路的枚举值并产生第二参考时钟信号，以及第二除法器电路，其分频第二参考时钟信号的频率并产生时钟信号。

公开(公告)号：US08140045B2

公开(公告)日：2012-03-20

申请号：US12003697

申请日：2007-12-31

申请人： Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Masami Endo ,  Hiroki Dembo ,  Daisuke Kawae ,  Takayuki Inoue ,  Munehiro Kozuma

发明人： Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Masami Endo ,  Hiroki Dembo ,  Daisuke Kawae ,  Takayuki Inoue ,  Munehiro Kozuma

IPC分类号： H04B1/28

CPC分类号： G06K19/07749 ,  G06K7/0008 ,  G06K19/0716 ,  G06K2017/0045

摘要： A semiconductor device is provided with a power supply circuit having a function to generate a power supply voltage from a wireless signal and an A/D converter circuit having a function to detect the strength of the wireless signal by an A/D conversion of a voltage generated from the wireless signal. This enables to provide a semiconductor device which does not require replacement of batteries, has few limitations on its physical shape and mass, and has a function to detect a physical position. By formation of the semiconductor device with use of a thin film transistor formed over a plastic substrate, a lightweight semiconductor device, which has flexibility in physical shape and a function to detect a physical location, can be provided at low cost.

摘要翻译： 半导体器件具有电源电路，该电源电路具有从无线信号产生电源电压的功能，以及具有通过A / D转换电压来检测无线信号的强度的功能的A / D转换电路 由无线信号产生。 这能够提供不需要更换电池的半导体器件，其物理形状和质量几乎没有限制，并且具有检测物理位置的功能。 通过使用形成在塑料基板上的薄膜晶体管形成半导体器件，可以以低成本提供具有物理形状的灵活性和检测物理位置的功能的轻量级的半导体器件。

公开(公告)号：US20080165023A1

公开(公告)日：2008-07-10

申请号：US12003697

申请日：2007-12-31

申请人： Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Masami Endo ,  Hiroki Dembo ,  Daisuke Kawae ,  Takayuki Inoue ,  Munehiro Kozuma

发明人： Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Masami Endo ,  Hiroki Dembo ,  Daisuke Kawae ,  Takayuki Inoue ,  Munehiro Kozuma

IPC分类号： G08B21/00

CPC分类号： G06K19/07749 ,  G06K7/0008 ,  G06K19/0716 ,  G06K2017/0045

摘要： A semiconductor device is provided with a power supply circuit having a function to generate a power supply voltage from a wireless signal and an A/D converter circuit having a function to detect the strength of the wireless signal by an A/D conversion of a voltage generated from the wireless signal. This enables to provide a semiconductor device which does not require replacement of batteries, has few limitations on its physical shape and mass, and has a function to detect a physical position. By formation of the semiconductor device with use of a thin film transistor formed over a plastic substrate, a lightweight semiconductor device, which has flexibility in physical shape and a function to detect a physical location, can be provided at low cost.

摘要翻译： 半导体器件具有电源电路，该电源电路具有从无线信号产生电源电压的功能，以及具有通过A / D转换电压来检测无线信号的强度的功能的A / D转换电路 由无线信号产生。 这能够提供不需要更换电池的半导体器件，其物理形状和质量几乎没有限制，并且具有检测物理位置的功能。 通过使用形成在塑料基板上的薄膜晶体管形成半导体器件，可以以低成本提供具有物理形状的灵活性和检测物理位置的功能的轻量级的半导体器件。

公开(公告)号：US08427280B2

公开(公告)日：2013-04-23

申请号：US13177583

申请日：2011-07-07

申请人： Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Masami Endo ,  Hiroki Dembo ,  Daisuke Kawae ,  Takayuki Inoue

发明人： Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Masami Endo ,  Hiroki Dembo ,  Daisuke Kawae ,  Takayuki Inoue

IPC分类号： H04Q5/22

CPC分类号： G06K19/07749

摘要： In a case where an ASK method is used for a communication method between a semiconductor device and a reader/writer, the amplitude of a radio signal is changed by data transmitted from the semiconductor device to the reader/writer when data is not transmitted from the reader/writer to the semiconductor device. Therefore, in some cases, the semiconductor device mistakes data transmitted from the semiconductor device itself for data transmitted from the reader/writer to the semiconductor device. The semiconductor device includes an antenna circuit, a transmission circuit, a reception circuit, and an arithmetic processing circuit. The antenna circuit transmits and receives a radio signal. The transmission circuit outputs to the reception circuit a signal showing whether or not the antenna circuit is transmitting the radio signal.

摘要翻译： 在使用ASK方式进行半导体装置与读取器/写入器之间的通信方式的情况下，通过从半导体装置发送到读取器/写入器的数据，无线信号的振幅由数据不从 读取器/写入器到半导体器件。 因此，在某些情况下，半导体器件将从半导体器件本身发送的数据错误地从读取器/写入器发送到半导体器件的数据。 半导体器件包括天线电路，发送电路，接收电路和运算处理电路。 天线电路发送和接收无线电信号。 发送电路向接收电路输出表示天线电路是否正在发送无线信号的信号。

公开(公告)号：US08781433B2

公开(公告)日：2014-07-15

申请号：US13368380

申请日：2012-02-08

申请人： Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Masami Endo ,  Hiroki Dembo ,  Daisuke Kawae ,  Takayuki Inoue ,  Munehiro Kozuma

发明人： Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Masami Endo ,  Hiroki Dembo ,  Daisuke Kawae ,  Takayuki Inoue ,  Munehiro Kozuma

IPC分类号： H04B1/28

CPC分类号： G06K19/07749 ,  G06K7/0008 ,  G06K19/0716 ,  G06K2017/0045

摘要： A semiconductor device is provided with a power supply circuit having a function to generate a power supply voltage from a wireless signal and an A/D converter circuit having a function to detect the strength of the wireless signal by an A/D conversion of a voltage generated from the wireless signal. This enables to provide a semiconductor device which does not require replacement of batteries, has few limitations on its physical shape and mass, and has a function to detect a physical position. By formation of the semiconductor device with use of a thin film transistor formed over a plastic substrate, a lightweight semiconductor device, which has flexibility in physical shape and a function to detect a physical location, can be provided at low cost.

摘要翻译： 半导体器件具有电源电路，该电源电路具有从无线信号产生电源电压的功能，以及具有通过A / D转换电压来检测无线信号的强度的功能的A / D转换电路 由无线信号产生。 这能够提供不需要更换电池的半导体器件，其物理形状和质量几乎没有限制，并且具有检测物理位置的功能。 通过使用形成在塑料基板上的薄膜晶体管形成半导体器件，可以以低成本提供具有物理形状的灵活性和检测物理位置的功能的轻量级的半导体器件。

公开(公告)号：US08429634B2

公开(公告)日：2013-04-23

申请号：US11878518

申请日：2007-07-25

申请人： Hiroki Dembo ,  Yoshiyuki Kurokawa ,  Masami Endo

发明人： Hiroki Dembo ,  Yoshiyuki Kurokawa ,  Masami Endo

IPC分类号： G06F9/45

CPC分类号： G06F8/447 ,  G06F9/4484

摘要： A semiconductor device has an arithmetic processing circuit provided with an arithmetic circuit and a control circuit and a memory circuit provided with a ROM and a RAM, where the arithmetic processing circuit and the memory circuit are connected to each other through an address bus and a data bus, a machine language program executed using the arithmetic processing circuit is stored in the ROM, the RAM has a plurality of banks, processing data obtained by executing the machine language program is divided into a plurality of stacks to be written to the plurality of banks, and the arithmetic processing circuit is operated in accordance with the machine language program so that, in the plurality of stacks stored in the plurality of banks, a stack of which data is not used until the machine language program is terminated is omitted and contiguous stacks are written to the same bank.

摘要翻译： 一种半导体器件具有运算电路和控制电路的运算处理电路和具有ROM和RAM的存储电路，其中算术处理电路和存储电路通过地址总线和数据彼此连接 总线，使用算术处理电路执行的机器语言程序被存储在ROM中，RAM具有多个存储体，通过执行机器语言程序获得的处理数据被划分为要写入多个存储体的多个堆叠 并且算术处理电路根据机器语言程序进行操作，从而在多个存储体中存储的多个堆栈中省略了在机器语言程序终止之前不使用数据的堆栈，并且连续的堆栈 被写入同一家银行。

公开(公告)号：US07639058B2

公开(公告)日：2009-12-29

申请号：US12021843

申请日：2008-01-29

申请人： Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Masami Endo ,  Hiroki Dembo ,  Daisuke Kawae ,  Takayuki Inoue ,  Munehiro Kozuma

发明人： Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Masami Endo ,  Hiroki Dembo ,  Daisuke Kawae ,  Takayuki Inoue ,  Munehiro Kozuma

IPC分类号： G06F1/04 ,  H03K3/00

CPC分类号： G06F7/68 ,  G06F1/025 ,  G06F1/04 ,  H04L7/033

摘要： The semiconductor device is provided with a clock signal generation circuit that includes a reference clock signal generation circuit which generates a first reference clock signal, a first counter circuit which counts the number of rising edges of the first reference clock signal by using the first reference clock signal and a synchronizing signal, a second counter circuit which counts the number of rising edges of the first reference clock signal by using an enumerated value of the first counter circuit, a first divider circuit which divides a frequency of the first reference clock signal by using the enumerated value of the first counter circuit and generates a second reference clock signal, and a second divider circuit which divides a frequency of the second reference clock signal and generates a clock signal.

摘要翻译： 半导体器件设置有时钟信号产生电路，其包括产生第一参考时钟信号的参考时钟信号产生电路，第一计数器电路，通过使用第一参考时钟对第一参考时钟信号的上升沿进行计数 信号和同步信号;第二计数器电路，通过使用第一计数器电路的枚举值对第一参考时钟信号的上升沿数进行计数;第一除法器电路，其使用第一参考时钟信号的频率进行分频; 第一计数器电路的枚举值并产生第二参考时钟信号，以及第二除法器电路，其分频第二参考时钟信号的频率并产生时钟信号。