公开(公告)号：US20190067564A1

公开(公告)日：2019-02-28

申请号：US16102522

申请日：2018-08-13

Applicant: IMEC vzw

Inventor： Johan Swerts ,  Kiroubanand Sankaran ,  Tsann Lin ,  Geoffrey Pourtois

IPC: H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  G11C11/16 ,  H01L27/22

Abstract: The disclosed technology generally relates to magnetic memory devices, and more particularly to spin transfer torque magnetic random access memory (STT-MRAM) devices having a magnetic tunnel junction (MTJ), and further relates to methods of fabricating the STT-MRAM devices. In an aspect, a magnetoresistive random access memory (MRAM) device has a magnetic tunnel junction (MTJ). The MTJ includes a magnetic reference layer comprising CoFeB, a magnetic free layer comprising CoFeB, and a barrier layer comprising MgO. The barrier layer is interposed between the magnetic reference layer and the magnetic free layer. The barrier layer has a thickness adapted to tunnel electrons between the magnetic reference layer and the magnetic free layer sufficient to cause a change in the magnetization direction of the variable magnetization under a bias. The MTJ further comprises a buffer layer comprising one or more of Co, Fe, CoFe and CoFeB, where the buffer layer is doped with one or both of C and N.

公开(公告)号：US20240290368A1

公开(公告)日：2024-08-29

申请号：US18587140

申请日：2024-02-26

Applicant: IMEC VZW

Inventor： Sofie Mertens ,  Kiroubanand Sankaran ,  Xiaoyu Piao ,  Robert Carpenter

IPC: G11C11/16 ,  H01F10/32 ,  H10B61/00 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85

CPC classification number: G11C11/161 ,  H01F10/3272 ,  H10B61/00 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85

Abstract: The disclosed technology generally relates to a stack for a magnetic random access memory device, for example, a stack including a magnetic tunnel junction with a high tunneling magnetoresistance ratio. In one aspect, the stack includes a substrate layer, a first electrode layer arranged on the substrate layer, and seed metal layer arranged on the first electrode layer, each layer having a [001] or [010] or [100] in-plane texture. The stack further includes a magnetic free layer arranged on the seed metal layer, a crystalline tunnel barrier layer arranged on the free layer, a magnetic reference layer arranged on the crystalline tunnel barrier layer, a pinning layer arranged on the reference layer, and a second electrode layer arranged on the pinning layer.

公开(公告)号：US20230178131A1

公开(公告)日：2023-06-08

申请号：US18062785

申请日：2022-12-07

Applicant: IMEC VZW

Inventor： Robert Carpenter ,  Woojim Kim ,  Kiroubanand Sankaran

IPC: G11C11/16 ,  H01F10/32 ,  H10B61/00 ,  H10N50/85 ,  H10N50/10

CPC classification number: G11C11/161 ,  H01F10/3286 ,  H01L27/222 ,  H01L43/10 ,  H01L43/08

Abstract: The present disclosure provides improved VCMA MRAM devices that include an engineered magnetic structure. The disclosure also presents the engineered magnetic structure, which includes a magnetic reference layer, a tunnel barrier layer provided on the magnetic reference layer, an interface layer provided on the tunnel barrier layer, a magnetic free layer provided on the interface layer, and a cap layer provided on the magnetic free layer. The interface layer and the cap layer are engineered to enhance an orbital occupancy and/or a spin-orbit-coupling of the magnetic free layer.

公开(公告)号：US10050192B2

公开(公告)日：2018-08-14

申请号：US15373342

申请日：2016-12-08

Applicant: IMEC VZW

Inventor： Johan Swerts ,  Kiroubanand Sankaran ,  Tsann Lin ,  Geoffrey Pourtois

IPC: H01L43/08 ,  H01L27/22 ,  G11C11/16 ,  H01L43/10 ,  H01L43/12

Abstract: The disclosed technology generally relates to magnetic memory devices, and more particularly to spin transfer torque magnetic random access memory (STT-MRAM) devices having a magnetic tunnel junction (MTJ), and further relates to methods of fabricating the STT-MRAM devices. In an aspect, a magnetoresistive random access memory (MRAM) device has a magnetic tunnel junction (MTJ). The MTJ includes a magnetic reference layer including CoFeB, a magnetic free layer comprising CoFeB, and a barrier layer including MgO. The barrier layer is interposed between the magnetic reference layer and the magnetic free layer. The barrier layer has a thickness adapted to tunnel electrons between the magnetic reference layer and the magnetic free layer sufficient to cause a change in the magnetization direction of the variable magnetization under a bias. The MTJ further comprises a buffer layer comprising one or more of Co, Fe, CoFe and CoFeB, where the buffer layer is doped with one or both of C and N.

公开(公告)号：US20170170390A1

公开(公告)日：2017-06-15

申请号：US15373342

申请日：2016-12-08

Applicant: IMEC VZW

Inventor： Johan Swerts ,  Kiroubanand Sankaran ,  Tsann Lin ,  Geoffrey Pourtois

IPC: H01L43/08 ,  H01L27/22

CPC classification number: H01L43/08 ,  G11C11/161 ,  G11C2211/5615 ,  H01L27/222 ,  H01L43/10 ,  H01L43/12

Abstract: The disclosed technology generally relates to magnetic memory devices, and more particularly to spin transfer torque magnetic random access memory (STT-MRAM) devices having a magnetic tunnel junction (MTJ), and further relates to methods of fabricating the STT-MRAM devices. In an aspect, a magnetoresistive random access memory (MRAM) device has a magnetic tunnel junction (MTJ). The MTJ includes a magnetic reference layer comprising CoFeB, a magnetic free layer comprising CoFeB, and a barrier layer comprising MgO. The barrier layer is interposed between the magnetic reference layer and the magnetic free layer. The barrier layer has a thickness adapted to tunnel electrons between the magnetic reference layer and the magnetic free layer sufficient to cause a change in the magnetization direction of the variable magnetization under a bias. The MTJ further comprises a buffer layer comprising one or more of Co, Fe, CoFe and CoFeB, where the buffer layer is doped with one or both of C and N.