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公开(公告)号:US20230165159A1
公开(公告)日:2023-05-25
申请号:US18058010
申请日:2022-11-22
Applicant: IMEC VZW
Inventor: Jose Diogo Costa , Sebastien Couet , Geoffrey Pourtois , Benoit Van Troeye
CPC classification number: H01L43/08 , G11C11/161 , H01L43/02
Abstract: The disclosure relates to spin orbit torque (SOT) magnetic random access (MRAM) devices. A magnetic structure for a SOT-MRAM device and a method for fabricating the magnetic structure are presented. The magnetic structure comprises a SOT layer and a magnetic tunnel junction (MTJ) structure arranged on the SOT layer. The SOT layer comprises a material combination of a bismuth-based material and a metal having a melting point of at least 1000° C. As a result, the SOT is thermally stable and also shows a large spin Hall angle (SHA).
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公开(公告)号:US11387350B2
公开(公告)日:2022-07-12
申请号:US16719852
申请日:2019-12-18
Applicant: IMEC vzw
Inventor: Geert Eneman , Bartlomiej Pawlak , Liesbeth Witters , Geoffrey Pourtois
IPC: H01L29/66 , H01L21/8234 , H01L21/84 , H01L29/161 , H01L29/78
Abstract: According to one aspect, a method of fabricating a semiconductor structure includes cutting a semiconductor fin extending along a substrate. Cutting the semiconductor fin can comprise forming a fin cut mask. The fin cut mask can define a number of masked regions and a number of cut regions. The method can include cutting the fin into a number of fin parts by etching the fin in the cut regions. The method can further comprise forming an epitaxial semiconductor capping layer on the fin prior to forming the fin cut mask or on the fin parts subsequent to cutting the fin. A capping layer material and a fin material can be lattice mismatched. According to another aspect, a corresponding semiconductor structure comprises fin parts.
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公开(公告)号:US09431519B2
公开(公告)日:2016-08-30
申请号:US14719995
申请日:2015-05-22
Applicant: IMEC VZW , Sony Corporation
Inventor: Hideki Minari , Shinichi Yoshida , Geoffrey Pourtois , Matty Caymax , Eddy Simoen
IPC: H01L27/088 , H01L21/336 , H01L29/66 , H01L29/20 , H01L29/06 , H01L21/02 , H01L21/285 , H01L21/762 , H01L21/3205 , H01L21/3213 , H01L29/78
CPC classification number: H01L29/66795 , H01L21/02538 , H01L21/02543 , H01L21/02546 , H01L21/02579 , H01L21/0262 , H01L21/2855 , H01L21/28556 , H01L21/32051 , H01L21/32053 , H01L21/32134 , H01L21/32135 , H01L21/76224 , H01L29/0653 , H01L29/20 , H01L29/66522 , H01L29/7851
Abstract: A method of producing a III-V fin structure within a gap separating shallow trench isolation (STI) structures and exposing a semiconductor substrate is disclosed, the method comprising providing a semiconductor substrate, providing in the semiconductor substrate at least two identical STI structures separated by a gap exposing the semiconductor substrate, wherein said gap is bounded by said at least two identical STI structures, and, producing a III-V fin structure within said gap on the exposed semiconductor substrate, and providing a diffusion barrier at least in contact with each side wall of said at least two identical STI structures and with side walls of said III-V fin structure and wherein said semiconductor substrate is a Si substrate.
Abstract translation: 公开了在分离浅沟槽隔离(STI)结构和暴露半导体衬底的间隙内产生III-V鳍结构的方法,该方法包括提供半导体衬底,在半导体衬底中提供至少两个相同的STI结构, 暴露半导体衬底的间隙,其中所述间隙由所述至少两个相同的STI结构界定,并且在所述暴露的半导体衬底上的所述间隙内产生III-V鳍结构,并且提供至少与每个 所述至少两个相同的STI结构的侧壁和所述III-V鳍结构的侧壁,并且其中所述半导体衬底是Si衬底。
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公开(公告)号:US09979402B2
公开(公告)日:2018-05-22
申请号:US15586165
申请日:2017-05-03
Applicant: IMEC VZW , Katholieke Universiteit Leuven
Inventor: Adrien Vaysset , Iuliana Radu , Geoffrey Pourtois
Abstract: The disclosed technology generally relates to magnetic devices and more particularly to spin torque majority gate devices, and to methods of operating such devices. In one aspect, a majority gate device comprises a free ferromagnetic layer comprising 3N input zones and an output zone. The output zone has a polygon shape having 3N sides, where each input zone adjoins the output zone. The input zones are arranged around the output zone according to a 3N-fold rotational symmetry, where N is a positive integer greater than 0. The input zones are spaced apart from one another by the output zone. The majority gate device additionally comprises a plurality of input controls, where each of the input zones is magnetically coupled to a corresponding one of the plurality of input controls, where each of the input controls is configured to control the magnetization state of the corresponding input zone. The majority gate device further comprises an output sensor magnetically coupled to the output zone, where the output sensor is adapted for sensing the magnetization state of the output zone. Each input zones adjoins the output zone at one of the 3N sides.
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公开(公告)号:US20170302280A1
公开(公告)日:2017-10-19
申请号:US15586165
申请日:2017-05-03
Applicant: IMEC VZW , Katholieke Universiteit Leuven
Inventor: Adrien Vaysset , luliana Radu , Geoffrey Pourtois
Abstract: The disclosed technology generally relates to magnetic devices and more particularly to spin torque majority gate devices, and to methods of operating such devices. In one aspect, a majority gate device comprises a free ferromagnetic layer comprising 3N input zones and an output zone. The output zone has a polygon shape having 3N sides, where each input zone adjoins the output zone. The input zones are arranged around the output zone according to a 3N-fold rotational symmetry, where N is a positive integer greater than 0. The input zones are spaced apart from one another by the output zone. The majority gate device additionally comprises a plurality of input controls, where each of the input zones is magnetically coupled to a corresponding one of the plurality of input controls, where each of the input controls is configured to control the magnetization state of the corresponding input zone. The majority gate device further comprises an output sensor magnetically coupled to the output zone, where the output sensor is adapted for sensing the magnetization state of the output zone. Each input zones adjoins the output zone at one of the 3N sides.
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公开(公告)号:US20150079399A1
公开(公告)日:2015-03-19
申请号:US14486678
申请日:2014-09-15
Applicant: IMEC VZW
Inventor: Cedric Huyghebaert , Philippe M. Vereecken , Geoffrey Pourtois
CPC classification number: C25F5/00 , B32B37/025 , B32B38/0008 , C01B32/19 , C01B32/194 , H01L21/187 , Y10T428/30
Abstract: A method for transferring a graphene layer from a metal substrate to a second substrate is provided comprising: providing a graphene layer on the metal substrate, adsorbing hydrogen atoms on the metal substrate by passing protons through the graphene layer, treating the metal substrate having adsorbed hydrogen atoms thereon in such a way as to form hydrogen gas from the adsorbed hydrogen atoms, thereby detaching the graphene layer from the metal substrate, transferring the graphene layer to the second substrate, and optionally reusing the metal substrate by repeating the aforementioned steps.
Abstract translation: 提供一种将石墨烯层从金属基板转移到第二基板的方法,包括:在金属基板上提供石墨烯层,通过使质子通过石墨烯层吸附金属基板上的氢原子,处理具有吸附氢的金属基板 从而从吸附的氢原子形成氢气,从而从石墨烯衬底分离石墨烯层,将石墨烯层转移到第二衬底,以及通过重复上述步骤任选重新使用金属衬底。
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公开(公告)号:US20230010899A1
公开(公告)日:2023-01-12
申请号:US17810548
申请日:2022-07-01
Applicant: IMEC VZW
Inventor: Michiel Jan van Setten , Hendrik F.W Dekkers , Karl Opsomer , Geoffrey Pourtois , Gouri Sankar Kar
IPC: H01L29/24 , C01G9/00 , C01G15/00 , H01L29/786 , H01L21/02
Abstract: In an aspect, a mixed metal oxide comprises or consists essentially of: a mixture comprises or consisting essentially of 0.30 to 0.69 parts by mole Mg, 0.20 to 0.69 parts by mole Zn, 0.01 to 0.30 parts by mole of a third element selected from Al and Ga, and, either, when the third element is Al, 0.00 to 0.31 parts by mole of other elements selected from metals and metalloids, or, when the third element is Ga, 0.00 to 0.15 parts by mole of other elements selected from metals and metalloids, wherein the sum of all parts by mole of Mg, Zn, the third element, and the other elements amounts to 1.00, wherein the amount in parts by mole of the other elements is lower than the amount in parts by mole of Mg and is lower than the amount in parts by mole of Zn; oxygen; and less than 0.01 parts by mole of non-metallic and non-metalloid impurities.
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公开(公告)号:US10128338B2
公开(公告)日:2018-11-13
申请号:US15787289
申请日:2017-10-18
Applicant: IMEC VZW , Katholieke Universiteit Leuven, KU LEUVEN R&D
Inventor: Hao Yu , Geoffrey Pourtois
IPC: H01L29/08 , H01L29/06 , H01L29/205 , H01L29/267 , H01L29/36 , H01L29/66 , H01L29/78 , H01L29/786 , B82Y10/00 , H01L29/417 , H01L29/45 , H01L29/775 , H01L29/423
Abstract: Within examples, a semiconductor device includes a first structure that includes a first doped semiconductor material of a first doping type. The semiconductor device further includes a metal in contact with the first structure, and a second structure that includes a second doped semiconductor material of the first doping type in contact with the first structure. A band off-set for majority charge carriers between the first doped semiconductor material and the second doped semiconductor material is sufficiently large for charge carriers from the second doped semiconductor material to be transferred into the first doped semiconductor material.
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公开(公告)号:US20160064535A1
公开(公告)日:2016-03-03
申请号:US14841566
申请日:2015-08-31
Applicant: IMEC VZW
Inventor: Anne S. Verhulst , Geoffrey Pourtois , Rita Rooyackers
IPC: H01L29/66 , H01L29/78 , H01L29/205 , H01L29/08 , H01L29/10
CPC classification number: H01L29/66977 , H01L29/0847 , H01L29/1033 , H01L29/205 , H01L29/66356 , H01L29/7391 , H01L29/78
Abstract: A Tunnel Field-Effect Transistor (TFET) device is provided comprising at least one heterosection between the source region and the channel region. The at least one heterosection has a low dielectric constant and thickness below 10 nm. Additionally a pocket region and another heterosection may be added in between the at least one heterosection and the channel region.
Abstract translation: 提供隧道场效应晶体管(TFET)器件,其包括源极区域和沟道区域之间的至少一个异源区域。 所述至少一个杂交具有低介电常数和低于10nm的厚度。 此外,可以在至少一个异源区域和沟道区域之间加入口袋区域和另一杂交。
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公开(公告)号:US20230382758A1
公开(公告)日:2023-11-30
申请号:US18325823
申请日:2023-05-30
Applicant: IMEC VZW
Inventor: Michiel Jan van Setten , Geoffrey Pourtois , Hendrik F.W. Dekkers , Gouri Sankar Kar
IPC: C01G30/00 , H01L29/786
CPC classification number: C01G30/005 , H01L29/78693 , C01P2002/02
Abstract: Mixed metal oxides and methods for making the mixed metal oxides are disclosed. A mixed metal oxide includes metal or metalloid elements including 0.50 to 0.90 parts by mole Mg, 0.05 to 0.30 parts by mole Al, 0.01 to 0.20 parts by mole Sb, and 0.00 to 0.31 parts by mole of other elements selected from metals and metalloids. The sum of all parts by mole of Mg, Al, Sb, and the other elements selected from metals and metalloids may amount to about 1.00. The mixed metal oxide additionally includes oxygen, and less than 0.01 parts by mole of non-metallic and non-metalloid impurities.
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