公开(公告)号：US20170148750A1

公开(公告)日：2017-05-25

申请号：US15323615

申请日：2014-08-07

Applicant: INTEL CORPORATION

Inventor： Ruchir SARASWAT ,  Uwe ZILLMANN ,  Nicholas P. COWLEY ,  Richard J. GOLDMAN

IPC: H01L23/64 ,  H01F41/04 ,  H01L49/02 ,  H01F27/28

CPC classification number: H01L23/645 ,  H01F17/0006 ,  H01F27/2804 ,  H01F41/041 ,  H01F2017/002 ,  H01L23/481 ,  H01L23/5227 ,  H01L28/10

Abstract: Described is an apparatus which comprises: a substrate; a plurality of holes formed as vias (e.g., through-silicon-vias (TSVs)) in the substrate; and a metal loop formed in a metal layer positioned above the plurality of holes such that a plane of the metal loop is orthogonal to the plurality of holes.

公开(公告)号：US20160241126A1

公开(公告)日：2016-08-18

申请号：US15025227

申请日：2013-11-27

Applicant: INTEL CORPORATION

Inventor： Vaibhav VAIDYA ,  Krishnan RAVICHANDRAN ,  Nicholas P. COWLEY

IPC: H02M1/088 ,  H02M3/07

CPC classification number: H02M1/088 ,  H02M3/07 ,  H02M3/158 ,  H02M2001/0087 ,  H02M2001/009

Abstract: Described is an apparatus which comprises: an interconnect to provide current; a bridge having a high-side switch and a low-side switch, wherein the high-side switch and the low-side switch are coupled to an inductor, and wherein the inductor is coupled to the interconnect; a plurality of switching load stages coupled to the interconnect, wherein each of the switching load stages of the plurality to provide a voltage supply to a load; a first controller to control duty cycle of an input to the bridge to regulate the current provided to the interconnect; and a second controller to control duty cycle of a plurality of inputs, each input to be received by a corresponding switching load stage of the plurality of switching load stages.

Abstract translation: 描述了一种装置，其包括：提供电流的互连; 具有高侧开关和低侧开关的桥，其中所述高侧开关和所述低侧开关耦合到电感器，并且其中所述电感器耦合到所述互连; 耦合到所述互连的多个开关负载级，其中所述多个开关负载级中的每一个为负载提供电压供应; 第一控制器，用于控制到桥的输入的占空比以调节提供给互连的电流; 以及第二控制器，用于控制多个输入的占空比，每个输入由所述多个开关负载级的对应的开关负载级接收。

公开(公告)号：US20190109107A1

公开(公告)日：2019-04-11

申请号：US16216881

申请日：2018-12-11

Applicant: Intel Corporation

Inventor： Kevin J. LEE ,  Ruchir SARASWAT ,  Uwe ZILLMANN ,  Nicholas P. COWLEY ,  Richard J. GOLDMAN

IPC: H01L23/00 ,  H01L23/64 ,  H01L23/48 ,  H01L23/522 ,  H01L23/66 ,  H01F27/28 ,  G06F1/16 ,  H03H7/42 ,  H03H9/64

Abstract: Described is an apparatus which comprises: a backside of a first die having a redistribution layer (RDL); and one or more passive planar devices disposed on the backside, the one or more passive planar devices formed in the RDL.

公开(公告)号：US20170025953A1

公开(公告)日：2017-01-26

申请号：US15188205

申请日：2016-06-21

Applicant: Intel Corporation

Inventor： Nicholas P. COWLEY ,  Harish K. Krishnamurthy ,  Ruchir Saraswat

IPC: H02M3/158 ,  H01L25/065 ,  H02M1/088 ,  H02M3/157

CPC classification number: H02M3/158 ,  H01L25/0657 ,  H01L2225/06541 ,  H02M1/088 ,  H02M3/157 ,  H02M2001/008

Abstract: Described is an apparatus which comprises: a first bridge to be coupled to a first load; a first Pulse Width Modulation (PWM) circuit to drive the first bridge; a second bridge to be coupled to a second load; and a second PWM circuit to drive the second bridge, wherein the first PWM circuit is controlled by a first digital word separate from a second digital word, wherein the second PWM circuit is controlled by the second digital, and wherein the second digital word is derived from the first digital word.

Abstract translation: 描述了一种装置，其包括：要耦合到第一负载的第一桥; 用于驱动第一桥的第一脉宽调制（PWM）电路; 耦合到第二负载的第二桥; 以及驱动所述第二桥的第二PWM电路，其中所述第一PWM电路由与第二数字字分离的第一数字字来控制，其中所述第二PWM电路由所述第二数字控制，并且其中所述第二数字字被导出 从第一个数字字。