公开(公告)号：US20170148750A1

公开(公告)日：2017-05-25

申请号：US15323615

申请日：2014-08-07

Applicant: INTEL CORPORATION

Inventor： Ruchir SARASWAT ,  Uwe ZILLMANN ,  Nicholas P. COWLEY ,  Richard J. GOLDMAN

IPC: H01L23/64 ,  H01F41/04 ,  H01L49/02 ,  H01F27/28

CPC classification number: H01L23/645 ,  H01F17/0006 ,  H01F27/2804 ,  H01F41/041 ,  H01F2017/002 ,  H01L23/481 ,  H01L23/5227 ,  H01L28/10

Abstract: Described is an apparatus which comprises: a substrate; a plurality of holes formed as vias (e.g., through-silicon-vias (TSVs)) in the substrate; and a metal loop formed in a metal layer positioned above the plurality of holes such that a plane of the metal loop is orthogonal to the plurality of holes.

公开(公告)号：US20230236996A1

公开(公告)日：2023-07-27

申请号：US18129748

申请日：2023-03-31

Applicant: Intel Corporation

Inventor： Ruchir SARASWAT ,  Sriram VENKATESAN ,  Pradeep KARAMCHETI ,  Mohit VERMA

IPC: G06F13/16 ,  G06T1/60 ,  G06F1/26

CPC classification number: G06F13/1668 ,  G06T1/60 ,  G06F1/266

Abstract: Inter-device communication with a pulse-amplitude modulation (PAM) signal can have at least two data eyes with different Vref levels. A physical interface (PHY) can be trained for the PAM signal by training a first data eye separately from the second data eye. The training can include adjusting the first Vref level separately from the second Vref level to center each reference voltage on its respective data eye.

公开(公告)号：US20190109107A1

公开(公告)日：2019-04-11

申请号：US16216881

申请日：2018-12-11

Applicant: Intel Corporation

Inventor： Kevin J. LEE ,  Ruchir SARASWAT ,  Uwe ZILLMANN ,  Nicholas P. COWLEY ,  Richard J. GOLDMAN

IPC: H01L23/00 ,  H01L23/64 ,  H01L23/48 ,  H01L23/522 ,  H01L23/66 ,  H01F27/28 ,  G06F1/16 ,  H03H7/42 ,  H03H9/64

Abstract: Described is an apparatus which comprises: a backside of a first die having a redistribution layer (RDL); and one or more passive planar devices disposed on the backside, the one or more passive planar devices formed in the RDL.