公开(公告)号：US20250016918A1

公开(公告)日：2025-01-09

申请号：US18751647

申请日：2024-06-24

Applicant: Infineon Technologies AG

Inventor： Martin Richard NIEßNER ,  Walter HARTNER ,  Gerhard HAUBNER

IPC: H05K1/03 ,  H05K1/18 ,  H05K3/30

Abstract: A printed circuit board for mounting at least one semiconductor chip device includes a metal structure provided in a first area of the printed circuit board for soldering the semiconductor chip device onto the metal structure. The printed circuit board includes a main surface, a layer stack including a first layer extending parallel to the main surface and a second layer extending parallel to the main surface. The first layer includes a first material having a first coefficient of thermal expansion in a lateral direction and the second layer includes a second material having a second coefficient of thermal expansion in the lateral direction such that the printed circuit board is forced by the layer stack into a curved shape at least in the first area of the printed circuit board.

公开(公告)号：US20160211189A1

公开(公告)日：2016-07-21

申请号：US14997596

申请日：2016-01-18

Applicant: Infineon Technologies AG

Inventor： Martin Richard NIESSNER ,  Walter HARTNER ,  Gerhard HAUBNER ,  Sebastian PAHLKE

IPC: H01L23/31 ,  H05K1/18 ,  H01L21/52 ,  H05K1/02 ,  H01L23/498 ,  H01L21/56

CPC classification number: H01L23/3128 ,  H01L21/52 ,  H01L21/563 ,  H01L23/145 ,  H01L23/3185 ,  H01L23/49822 ,  H01L23/66 ,  H01L24/20 ,  H01L2223/6677 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2924/18162 ,  H01L2924/3511 ,  H05K1/0271 ,  H05K1/181

Abstract: A chip carrier for carrying an encapsulated electronic chip, wherein the chip carrier comprises a laminate structure formed as a stack of a plurality of electrically insulating structures and a plurality of electrically conductive structures, and a chip coupling area at an exposed surface of the laminate structure being configured for electrically and mechanically coupling the encapsulated electronic chip, wherein one of the electrically insulating structures is configured as high frequency dielectric made of a material being compatible with low-loss transmission of a high-frequency signal, and wherein at least one of another one of the electrically insulating structures and one of the electrically conductive structures is configured as a thermomechanical buffer for buffering thermally induced mechanical load.

Abstract translation: 一种用于承载封装的电子芯片的芯片载体，其中所述芯片载体包括形成为多个电绝缘结构和多个导电结构的堆叠的叠层结构，以及在所述层叠结构的暴露表面处的芯片耦合区域 被配置为电气和机械地耦合所述封装的电子芯片，其中所述电绝缘结构中的一个被配置为由与高频信号的低损耗传输兼容的材料制成的高频电介质，并且其中至少一个 电绝缘结构之一和导电结构中的一个被构造为用于缓冲热致机械载荷的热机械缓冲器。