公开(公告)号：US20190198455A1

公开(公告)日：2019-06-27

申请号：US16227427

申请日：2018-12-20

Applicant: Infineon Technologies AG

Inventor： Walter HARTNER ,  Christian GEISSLER ,  Thomas KILGER ,  Johannes LODERMEYER ,  Franz-Xaver MUEHLBAUER ,  Martin Richard NIESSNER ,  Claus WAECHTER

IPC: H01L23/00 ,  H01L23/66 ,  H01L23/31 ,  H01L21/56 ,  H01Q1/22

CPC classification number: H01L23/562 ,  H01L21/563 ,  H01L23/3157 ,  H01L23/66 ,  H01L2223/6677 ,  H01Q1/2283

Abstract: A semiconductor apparatus comprises: a circuit board; a semiconductor package having a main surface, wherein the semiconductor package is arranged on the circuit board and the main surface faces the circuit board; a radio-frequency line element of the semiconductor package, which radio-frequency line element is arranged on the main surface or inside the semiconductor package, wherein the radio-frequency line element is designed to transmit a signal at a frequency of greater than 10 GHz; and an underfiller material arranged between the circuit board and the semiconductor package, wherein the radio-frequency line element and the underfiller material do not overlap in an orthogonal projection onto the main surface.

公开(公告)号：US20220165687A1

公开(公告)日：2022-05-26

申请号：US17502084

申请日：2021-10-15

Applicant: Infineon Technologies AG

Inventor： Thorsten MEYER ,  Thomas BEMMERL ,  Martin GRUBER ,  Martin Richard NIESSNER

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L21/56 ,  H01L21/48

Abstract: A package is disclosed. In one example, the package comprises a carrier, an electronic component mounted on the carrier, an encapsulant encapsulating at least part of the electronic component and at least part of the carrier and having a bottom side at a first vertical level. At least one lead is electrically coupled with the electronic component and comprising a first lead portion being encapsulated in the encapsulant and a second lead portion extending out of the encapsulant at the bottom side of the encapsulant. A functional structure at the bottom side extends up to a second vertical level different from the first vertical level.

公开(公告)号：US20160211189A1

公开(公告)日：2016-07-21

申请号：US14997596

申请日：2016-01-18

Applicant: Infineon Technologies AG

Inventor： Martin Richard NIESSNER ,  Walter HARTNER ,  Gerhard HAUBNER ,  Sebastian PAHLKE

IPC: H01L23/31 ,  H05K1/18 ,  H01L21/52 ,  H05K1/02 ,  H01L23/498 ,  H01L21/56

CPC classification number: H01L23/3128 ,  H01L21/52 ,  H01L21/563 ,  H01L23/145 ,  H01L23/3185 ,  H01L23/49822 ,  H01L23/66 ,  H01L24/20 ,  H01L2223/6677 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2924/18162 ,  H01L2924/3511 ,  H05K1/0271 ,  H05K1/181

Abstract: A chip carrier for carrying an encapsulated electronic chip, wherein the chip carrier comprises a laminate structure formed as a stack of a plurality of electrically insulating structures and a plurality of electrically conductive structures, and a chip coupling area at an exposed surface of the laminate structure being configured for electrically and mechanically coupling the encapsulated electronic chip, wherein one of the electrically insulating structures is configured as high frequency dielectric made of a material being compatible with low-loss transmission of a high-frequency signal, and wherein at least one of another one of the electrically insulating structures and one of the electrically conductive structures is configured as a thermomechanical buffer for buffering thermally induced mechanical load.

Abstract translation: 一种用于承载封装的电子芯片的芯片载体，其中所述芯片载体包括形成为多个电绝缘结构和多个导电结构的堆叠的叠层结构，以及在所述层叠结构的暴露表面处的芯片耦合区域 被配置为电气和机械地耦合所述封装的电子芯片，其中所述电绝缘结构中的一个被配置为由与高频信号的低损耗传输兼容的材料制成的高频电介质，并且其中至少一个 电绝缘结构之一和导电结构中的一个被构造为用于缓冲热致机械载荷的热机械缓冲器。

公开(公告)号：US20240258372A1

公开(公告)日：2024-08-01

申请号：US18518846

申请日：2023-11-24

Applicant: Infineon Technologies AG

Inventor： Sebastian POLSTER ,  Alexander HEINRICH ,  Martin Richard NIESSNER

IPC: H01L29/06 ,  H01L21/78 ,  H01L23/00

CPC classification number: H01L29/0657 ,  H01L21/78 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L29/1608 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/3201 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/8382 ,  H01L2924/10156 ,  H01L2924/10272

Abstract: An electronic component is disclosed. The electronic component comprises a semiconductor body, an active region in a central portion of the semiconductor body, and a stress release structure for releasing stress and being formed as a lateral edge portion of the semiconductor body. The lateral edge portion has a minimum thickness of not more than 40% of a maximum thickness of the semiconductor body.

公开(公告)号：US20200321295A1

公开(公告)日：2020-10-08

申请号：US16841298

申请日：2020-04-06

Applicant: Infineon Technologies AG

Inventor： Walter HARTNER ,  Francesca ARCIONI ,  Birgit HEBLER ,  Martin Richard NIESSNER ,  Claus WAECHTER ,  Maciej WOJNOWSKI

IPC: H01L23/00 ,  H01L23/522

Abstract: A semiconductor device comprises a semiconductor chip having a radio-frequency circuit and a radio-frequency terminal, an external radio-frequency terminal, and a non-galvanic connection arranged between the radio-frequency terminal of the semiconductor chip and the external radio-frequency terminal, wherein the non-galvanic connection is designed to transmit a radio-frequency signal.