-
公开(公告)号：US10103751B2
公开(公告)日：2018-10-16
申请号：US15188957
申请日：2016-06-21
Applicant: Inphi Corporation
Inventor： Damian Alfonso Morero , Mario Alejandro Castrillon , Matias German Schnidrig , Mario Rafael Hueda , Franco Paludi
Abstract: A decoder performs forward error correction based on quasi-cyclic regular column-partition low density parity check codes. A method for designing the parity check matrix reduces the number of short-cycles of the matrix to increase performance. An adaptive quantization post-processing technique further improves performance by eliminating error floors associated with the decoding. A parallel decoder architecture performs iterative decoding using a parallel pipelined architecture.
-
公开(公告)号：US10715259B1
公开(公告)日：2020-07-14
申请号：US16256637
申请日：2019-01-24
Applicant: INPHI CORPORATION
Inventor： Mario Rafael Hueda , José L. Correa Lust , Damian Alfonso Morero
Abstract: A method and structure for compensation techniques in coherent optical receivers. The present invention provides a coherent optical receiver with an improved 8×8 adaptive MIMO (Multiple Input, Multiple Output) equalizer configured within a digital signal processor (DSP) to compensate the effects of transmitter I/Q skew in subcarrier multiplexing (SCM) schemes. The 8×8 MIMO equalizer can be configured such that each of the 8 outputs is electrically coupled to 3 of 8 inputs, wherein each of the input-output couplings is configured as a filter. The method includes compensating for impairments to the digital conversion of an optical input signal via the 8×8 MIMO equalizer following other signal processing steps, such as chromatic dispersion (CD)/polarization-mode dispersion (PMD) compensation, carrier recovery, timing synchronization, and cycle slip correction.
-
公开(公告)号：US10177851B2
公开(公告)日：2019-01-08
申请号：US15647765
申请日：2017-07-12
Applicant: INPHI CORPORATION
Inventor： Oscar Ernesto Agazzi , Diego Ernesto Crivelli , Paul Voois , Ramiro Rogelio Lopez , Jorge Manuel Finochietto , Norman L. Swenson , Mario Rafael Hueda , Hugo Santiago Carrer , Vadim Gutnik , Adrián Ulises Morales , Martin Ignacio Del Barco , Martin Carlos Asinari , Federico Nicolas Paredes , Alfredo Javier Taddei , Mauro Marcelo Bruni , Damian Alfonso Morero , Facundo Abel Alcides Ramos , María Laura Ferster , Elvio Adrian Serrano , Pablo Gustavo Quiroga , Roman Antonio Arenas , Matias German Schnidrig , Alejandro Javier Schwoykoski
IPC: H04B10/00 , H04B10/516 , H04B10/40 , H04B10/61 , H04L7/00
Abstract: A coherent receiver comprises an ingress signal path having an ingress line-side interface, and an ingress host-side interface. The ingress signal path is configured to receive an analog signal vector at the ingress line-side interface, to demodulate the analog signal vector, and to output a digital data signal Fat the ingress host-side interface. The coherent receiver also comprises clock and timing circuitry configured to receive a single reference clock signal and to provide a plurality of modified ingress path clock signals to different components of the ingress signal path, the plurality of modified ingress path clock signals derived from the single reference clock signal and the plurality of modified ingress path clock signals having different clock rates. The receiver, transmitter, or transceiver can operate in a plurality of programmable operating modes to accommodate different modulation/de-modulation schemes, error correction code schemes, framing/mapping protocols, or other programmable features.
-
公开(公告)号：US10164715B2
公开(公告)日：2018-12-25
申请号：US16011470
申请日：2018-06-18
Applicant: INPHI CORPORATION
Inventor： Damian Alfonso Morero , Martin Carlos Asinari , Martin Ignacio Del Barco , Mario Rafael Hueda , Lucas Javier Yoaquino
IPC: H04B10/2513 , H04L27/06 , H04B10/61 , H04L25/06
Abstract: An adaptive demapper adaptively demaps an input symbol. An input symbol is received and demapped in a hard-output demapper to generate a current detected symbol corresponding to a constellation point on a current constellation closest to the input symbol. A corrected inverse of a current noise power estimate is determined by updating a previous noise power estimate based on a difference between the input symbol and the current detected symbol. In a soft-output demapper, a log likelihood ratio corresponding to the current detected symbol is determined based on the corrected inverse of the current noise power estimate. The constellation point in the current constellation corresponding to the current detected symbol is then updated to generate an updated constellation based on a difference between the constellation point and the received input symbol.
-
公开(公告)号：US10110317B1
公开(公告)日：2018-10-23
申请号：US15256210
申请日：2016-09-02
Applicant: INPHI CORPORATION
Inventor： Damian Alfonso Morero , Mario Rafael Hueda , Shu Hao Fan
IPC: H04B10/06 , H04B10/61 , H04B10/516 , H04L25/03 , H04B7/005 , H04B7/0413
Abstract: Apparatus and method for compensating for transmitter errors in an optical communication system are provided. In certain configurations herein, a receiver is provided for processing an analog signal vector representing an optical signal received from a transmitter. The receiver includes an analog front-end that converts the analog signal vector into a digital signal vector including a digital representation of an I component and a Q component of the optical signal. The receiver further includes a digital signal processing circuit configured to process the digital signal vector to recover data, and the digital signal processing circuit includes a transmitter error compensation system that compensates the digital signal vector for at least one of a transmit skew error of the transmitter or a modulator biasing error of the transmitter.
-
Patent Agency Ranking
公开(公告)号：US10063262B2
公开(公告)日：2018-08-28
申请号：US15000978
申请日：2016-01-19
Applicant: Inphi Corporation
Inventor： Damian Alfonso Morero , Mario Alejandro Castrillon , Matias German Schnidrig , Mario Rafael Hueda
CPC classification number: H03M13/616 , H03M13/112 , H03M13/1137 , H03M13/116 , H03M13/6577
Abstract: A decoder performs forward error correction based on quasi-cyclic regular column-partition low density parity check codes. A method for designing the parity check matrix reduces the number of short-cycles of the matrix to increase performance. An adaptive quantization post-processing technique further improves performance by eliminating error floors associated with the decoding. A parallel decoder architecture performs iterative decoding using a parallel pipelined architecture.
-
公开(公告)号：US10038498B1
公开(公告)日：2018-07-31
申请号：US15256173
申请日：2016-09-02
Applicant: INPHI CORPORATION
Inventor： Shu Hao Fan , Damian Alfonso Morero , Mario Rafael Hueda
CPC classification number: H04B10/07955 , H04B7/005 , H04B7/0413 , H04B10/40 , H04B10/50 , H04B10/5053 , H04B10/5161 , H04B10/532 , H04B10/61 , H04B10/616 , H04L25/03 , H04L25/14
Abstract: Apparatus and method for transmitter alignment in an optical communication system are provided. In certain configurations, a method of correcting for transmitter skew is provided. The method includes generating an optical signal using a transmitter based on an in-phase (I) component and a quadrature-phase (Q) component of a transmit signal, the optical signal having a baud rate that is based on a timing tone. The method further includes receiving the optical signal as an input to a receiver, and generating a signal vector representing the optical signal using the receiver. The signal vector includes an I component and a Q component. The method further includes calculating a power of the timing tone based on processing the signal vector using a tone power calculator of the receiver, and correcting for a skew of the transmitter based on the calculated power.
-
公开(公告)号：US11005571B2
公开(公告)日：2021-05-11
申请号：US16892146
申请日：2020-06-03
Applicant: INPHI CORPORATION
Inventor： Mario Rafael Hueda , José L. Correa Lust , Damian Alfonso Morero
IPC: H04B10/61 , H04L27/227 , H04L27/38 , H04B10/40 , H04J14/02
Abstract: A method and structure for compensation techniques in coherent optical receivers. The present invention provides a coherent optical receiver with an improved 8×8 adaptive MIMO (Multiple Input, Multiple Output) equalizer configured within a digital signal processor (DSP) to compensate the effects of transmitter I/Q skew in subcarrier multiplexing (SCM) schemes. The 8×8 MIMO equalizer can be configured such that each of the 8 outputs is electrically coupled to 3 of 8 inputs, wherein each of the input-output couplings is configured as a filter. The method includes compensating for impairments to the digital conversion of an optical input signal via the 8×8 MIMO equalizer following other signal processing steps, such as chromatic dispersion (CD)/polarization-mode dispersion (PMD) compensation, carrier recovery, timing synchronization, and cycle slip correction.
-
公开(公告)号：US10742327B2
公开(公告)日：2020-08-11
申请号：US16600328
申请日：2019-10-11
Applicant: INPHI CORPORATION
Inventor： Oscar Ernesto Agazzi , Diego Ernesto Crivelli , Paul Voois , Ramiro Rogelio Lopez , Jorge Manuel Finochietto , Norman L. Swenson , Mario Rafael Hueda , Hugo Santiago Carrer , Vadim Gutnik , Adrián Ulises Morales , Martin Ignacio Del Barco , Martin Carlos Asinari , Federico Nicolas Paredes , Alfredo Javier Taddei , Mauro Marcelo Bruni , Damian Alfonso Morero , Facundo Abel Alcides Ramos , María Laura Ferster , Elvio Adrian Serrano , Pablo Gustavo Quiroga , Roman Antonio Arenas , Matias German Schnidrig , Alejandro Javier Schwoykoski
IPC: H04B10/40 , H04B10/516 , H04B10/61 , H04L7/00
Abstract: A coherent receiver comprises an ingress signal path having an ingress line-side interface, and an ingress host-side interface. The ingress signal path is configured to receive an analog signal vector at the ingress line-side interface, to demodulate the analog signal vector, and to output a digital data signal Fat the ingress host-side interface. The coherent receiver also comprises clock and timing circuitry configured to receive a single reference clock signal and to provide a plurality of modified ingress path clock signals to different components of the ingress signal path, the plurality of modified ingress path clock signals derived from the single reference clock signal and the plurality of modified ingress path clock signals having different clock rates. The receiver, transmitter, or transceiver can operate in a plurality of programmable operating modes to accommodate different modulation/de-modulation schemes, error correction code schemes, framing/mapping protocols, or other programmable features.
-
公开(公告)号：US09806823B2
公开(公告)日：2017-10-31
申请号：US15351173
申请日：2016-11-14
Applicant: Inphi Corporation
CPC classification number: H04B10/6165 , H04B10/616 , H04L1/0045 , H04L1/0054 , H04L7/033
Abstract: A receiver architecture and method recovers data received over an optical fiber channel in the presence of cycle slips. In a first cycle slip recovery architecture, a receiver detects and corrects cycle slips based on pilot symbols inserted in the transmitted data. In a second cycle slip recovery architecture, a coarse cycle slip detection is performed based on pilot symbols and a cycle slip position estimation is then performed based on carrier phase noise. The receiver compensates for cycle slips based on the position estimation.
-
-
-
-
-
-
-
-
-
Search Results
16
records
(took 0.018 seconds)
