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1.发明授权Systems and methods for estimation of offset and gain errors in a time-interleaved analog-to-digital converter 有权用于估计时间交织模数转换器中偏移和增益误差的系统和方法公开(公告)号：US09154147B2
公开(公告)日：2015-10-06
申请号：US14209848
申请日：2014-03-13
Applicant: Integrated Device Technology, Inc.
Inventor： Arnaud Biallais , Fatima Ghanem
CPC classification number: H03M1/0609 , H03M1/0607 , H03M1/08 , H03M1/109 , H03M1/121 , H03M1/1215
Abstract: The present disclosure relates to the field of background estimation in a time-interleaved analog-to-digital converter (ADC). More specifically, the present disclosure relates to systems and methods for background estimation of offset and gain errors in a time-interleaved ADC based on sample count. The error estimation unit of the time-interleaved ADC system includes a counting unit, a subtractor and an integrator. The method for estimating an offset error in a time-interleaved ADC includes determining signs of the signals and outputting corresponding values by the counting unit. The values are further compared and integrated to estimate the offset error. The method for estimating a gain error in a time-interleaved ADC includes determining the absolute values of the signals and comparing the absolute values with a predetermined threshold value. The comparison results are further integrated to estimate the gain error.
Abstract translation: 本公开涉及时间交织的模数转换器（ADC）中的背景估计领域。 更具体地，本公开涉及用于基于样本计数的时间交织ADC中的偏移和增益误差的背景估计的系统和方法。 时间交织的ADC系统的误差估计单元包括计数单元，减法器和积分器。 用于估计时间交替ADC中的偏移误差的方法包括确定信号的符号并由计数单元输出相应的值。 进一步比较和积分这些值以估计偏移误差。 用于估计时间交替ADC中的增益误差的方法包括确定信号的绝对值并将绝对值与预定阈值进行比较。 比较结果被进一步整合以估计增益误差。
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2.发明授权Digital extraction and correction of the linearity of a residue amplifier in a pipeline ADC 有权数字提取和校正管道ADC中残留放大器的线性度公开(公告)号：US09281831B2
公开(公告)日：2016-03-08
申请号：US14201624
申请日：2014-03-07
Applicant: Integrated Device Technology, Inc.
Inventor： Herve Marie , Arnaud Biallais
CPC classification number: H03M1/002 , H03M1/1052 , H03M1/109 , H03M1/164 , H03M1/183
Abstract: Embodiments of a pipeline analog-to-digital converter is provided. In accordance with some embodiments, a pipeline analog-to-digital converter includes a stage, the stage including a residue amplifier that amplifies a residual voltage generated by the stage to obtain an amplified residual voltage; a backend digitizer that digitizes the amplified residual voltage to generate a digitized residual; and a digital correction circuit that corrects the digitized residual according to which zone the digitized residual is found.
Abstract translation: 提供了一种管线模数转换器的实施例。 根据一些实施例，管线模数转换器包括一个级，该级包括一个残余放大器，放大该级产生的残余电压以获得放大的残余电压; 后置数字转换器，其将放大的残余电压数字化以产生数字化残差; 以及数字校正电路，根据哪个区域找到数字化残差来校正数字化残差。
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3.发明申请DIGITAL EXTRACTION AND CORRECTION OF THE LINEARITY OF A RESIDUE AMPLIFIER IN A PIPELINE ADC 有权数字提取和校正ADP中的残留放大器的线性公开(公告)号：US20150256189A1
公开(公告)日：2015-09-10
申请号：US14201624
申请日：2014-03-07
Applicant: Integrated Device Technology, Inc.
Inventor： Herve Marie , Arnaud Biallais
CPC classification number: H03M1/002 , H03M1/1052 , H03M1/109 , H03M1/164 , H03M1/183
Abstract: Embodiments of a pipeline analog-to-digital converter is provided. In accordance with some embodiments, a pipeline analog-to-digital converter includes a stage, the stage including a residue amplifier that amplifies a residual voltage generated by the stage to obtain an amplified residual voltage; a backend digitizer that digitizes the amplified residual voltage to generate a digitized residual; and a digital correction circuit that corrects the digitized residual according to which zone the digitized residual is found.
Abstract translation: 提供了一种管线模数转换器的实施例。 根据一些实施例，管线模数转换器包括一个级，该级包括一个残余放大器，放大该级产生的残余电压以获得放大的残余电压; 后置数字转换器，其将放大的残余电压数字化以产生数字化残差; 以及数字校正电路，根据哪个区域找到数字化残差来校正数字化残差。
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4.发明申请SYSTEMS AND METHODS FOR ESTIMATION OF OFFSET AND GAIN ERRORS IN A TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTER 有权用于估计时间偏移模数转换器中的偏移和增益误差的系统和方法公开(公告)号：US20140266823A1
公开(公告)日：2014-09-18
申请号：US14209848
申请日：2014-03-13
Applicant: Integrated Device Technology, Inc.
Inventor： Arnaud Biallais , Fatima Ghanem
IPC: H03M1/08
CPC classification number: H03M1/0609 , H03M1/0607 , H03M1/08 , H03M1/109 , H03M1/121 , H03M1/1215
Abstract: The present disclosure relates to the field of background estimation in a time-interleaved analog-to-digital converter (ADC). More specifically, the present disclosure relates to systems and methods for background estimation of offset and gain errors in a time-interleaved ADC based on sample count. The error estimation unit of the time-interleaved ADC system includes a counting unit, a subtractor and an integrator. The method for estimating an offset error in a time-interleaved ADC includes determining signs of the signals and outputting corresponding values by the counting unit. The values are further compared and integrated to estimate the offset error. The method for estimating a gain error in a time-interleaved ADC includes determining the absolute values of the signals and comparing the absolute values with a predetermined threshold value. The comparison results are further integrated to estimate the gain error.
Abstract translation: 本公开涉及时间交织的模数转换器（ADC）中的背景估计领域。 更具体地，本公开涉及用于基于样本计数的时间交织ADC中的偏移和增益误差的背景估计的系统和方法。 时间交织的ADC系统的误差估计单元包括计数单元，减法器和积分器。 用于估计时间交替ADC中的偏移误差的方法包括确定信号的符号并由计数单元输出相应的值。 进一步比较和积分这些值以估计偏移误差。 用于估计时间交替ADC中的增益误差的方法包括确定信号的绝对值并将绝对值与预定阈值进行比较。 比较结果被进一步整合以估计增益误差。
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