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    On-chip optical isolator
    1.
    发明授权
    On-chip optical isolator 有权

    公开(公告)号：US10466515B2

    公开(公告)日：2019-11-05

    申请号：US15071105

    申请日：2016-03-15

    Applicant: Intel Corporation

    Inventor： John Heck ,  David N. Hutchison ,  Jie Sun ,  Haisheng Rong ,  Woosung Kim

    IPC: G02B6/13 ,  G02B6/12 ,  G02B6/27 ,  G02B6/293 ,  G02F1/095 ,  H01S5/00 ,  G02B6/132 ,  G02F1/00

    Abstract: Embodiments herein relate to photonic integrated circuits with an on-chip optical isolator. A photonic transmitter chip may include a laser and an on-chip isolator optically coupled with the laser that includes an optical waveguide having a section coupled with a magneto-optic liquid phase epitaxy grown garnet film. In some embodiments, a cladding may be coupled with the garnet film, the on-chip isolator may be arranged in a Mach-Zehnder interferometer configuration, the waveguide may include one or more polarization rotators, and/or the garnet film may be formed of a material from a rare-earth garnet family. Other embodiments may be described and/or claimed.

    FEEDBACK CONTROLLED CLOSED LOOP ON-CHIP ISOLATOR
    2.
    发明申请
    FEEDBACK CONTROLLED CLOSED LOOP ON-CHIP ISOLATOR 有权

    公开(公告)号：US20180031873A1

    公开(公告)日：2018-02-01

    申请号：US15221436

    申请日：2016-07-27

    Applicant: Intel Corporation

    Inventor： Woosung Kim ,  Haisheng Rong ,  John Heck

    IPC: G02F1/095 ,  G02F1/09 ,  G02B6/27

    CPC classification number: G02F1/0955 ,  G02B6/2746 ,  G02F1/092

    Abstract: Embodiments herein relate to a photonic integrated circuit (PIC) with an on-chip optical isolator. The PIC may comprise a laser, a waveguide coupled with the laser, and a closed loop resonator coupled to the laser through the waveguide. A magneto-optical (MO) layer is over and in contact with the waveguide and the closed loop resonator. The closed loop resonator may comprise a first polarization rotator (PR) and a second PR. A light from the laser in transverse electric (TE) mode through the waveguide is rotated in the first PR to a light in transverse magnetic (TM) mode, and the light in TM mode is rotated in the second PR to light in TE mode. The isolator may further comprise a micro-heater over or along a side of the waveguide and separated from the closed loop resonator; and a feedback control loop connected to the closed loop resonator and the micro-heater.

    CO-PACKAGING WITH SILICON PHOTONICS HYBRID PLANAR LIGHTWAVE CIRCUIT
    3.
    发明公开
    CO-PACKAGING WITH SILICON PHOTONICS HYBRID PLANAR LIGHTWAVE CIRCUIT 审中-公开

    公开(公告)号：US20240264396A1

    公开(公告)日：2024-08-08

    申请号：US18624198

    申请日：2024-04-02

    Applicant: Intel Corporation

    Inventor： Sang Yup Kim ,  Myung Jin Yim ,  Woosung Kim

    IPC: G02B6/43 ,  G02B6/12 ,  G02B6/122 ,  G02B6/42

    CPC classification number: G02B6/43 ,  G02B6/122 ,  G02B6/4212 ,  G02B6/4274 ,  G02B2006/12061

    Abstract: An interposer apparatus for co-packaging an electronic integrated circuit and a photonic integrated circuit may include a dielectric substrate; an optical waveguide disposed on the dielectric substrate to optically couple the photonic integrated circuit disposed on one side of the dielectric substrate with at least one of another photonic integrated circuit disposed on the dielectric substrate or an optical device disposed on the dielectric substrate; and a metal interconnect disposed through the dielectric substrate to electrically couple the photonic integrated circuit disposed on the one side of the dielectric substrate with an electronic integrated circuit disposed on the other side of the dielectric substrate.

    CO-PACKAGING WITH SILICON PHOTONICS HYBRID PLANAR LIGHTWAVE CIRCUIT
    4.
    发明申请
    CO-PACKAGING WITH SILICON PHOTONICS HYBRID PLANAR LIGHTWAVE CIRCUIT 有权

    公开(公告)号：US20230091428A1

    公开(公告)日：2023-03-23

    申请号：US17992670

    申请日：2022-11-22

    Applicant: Intel Corporation

    Inventor： Sang Yup Kim ,  Myung Jin Yim ,  Woosung Kim

    IPC: G02B6/43 ,  G02B6/122 ,  G02B6/42

    Abstract: An interposer apparatus for co-packaging an electronic integrated circuit and a photonic integrated circuit may include a dielectric substrate; an optical waveguide disposed on the dielectric substrate to optically couple the photonic integrated circuit disposed on one side of the dielectric substrate with at least one of another photonic integrated circuit disposed on the dielectric substrate or an optical device disposed on the dielectric substrate; and a metal interconnect disposed through the dielectric substrate to electrically couple the photonic integrated circuit disposed on the one side of the dielectric substrate with an electronic integrated circuit disposed on the other side of the dielectric substrate.

    PHOTONIC DIE PACKAGE WITH EDGE LENS
    5.
    发明申请
    PHOTONIC DIE PACKAGE WITH EDGE LENS 审中-公开

    公开(公告)号：US20180348434A1

    公开(公告)日：2018-12-06

    申请号：US15609403

    申请日：2017-05-31

    Applicant: Intel Corporation

    Inventor： Myung Jin Yim ,  Sang Yup Kim ,  Woosung Kim

    IPC: G02B6/26 ,  H01L31/0232 ,  H01L25/16 ,  H01L23/00 ,  H01L23/367 ,  G02B6/34

    Abstract: Embodiments herein may include apparatuses, systems, and processes related to a photonic die package with an edge lens that includes a photonic integrated circuit (IC) die, a lens coupled to the photonic IC die and disposed at an edge of the package to provide an optical path at the edge of the package for photon signals generated or received by the photonic IC die, and an electronic IC die coupled to the photonic IC die, where the electronic IC die is to process electrical signals received from the photonic IC die, and where the electronic IC die and the photonic IC die are in a stack formation to facilitate thermal energy conduction from the electronic IC die to the photonic IC die. Other embodiments may be described and/or claimed.

    Co-packaging with silicon photonics hybrid planar lightwave circuit
    6.
    发明授权
    Co-packaging with silicon photonics hybrid planar lightwave circuit 有权

    公开(公告)号：US11531174B2

    公开(公告)日：2022-12-20

    申请号：US16642671

    申请日：2017-09-28

    Applicant: Intel Corporation

    Inventor： Sang Yup Kim ,  Myung Jin Yim ,  Woosung Kim

    IPC: G02B6/43 ,  G02B6/122 ,  G02B6/42 ,  G02B6/12

    Abstract: An interposer apparatus for co-packaging an electronic integrated circuit and a photonic integrated circuit may include a dielectric substrate; an optical waveguide disposed on the dielectric substrate to optically couple the photonic integrated circuit disposed on one side of the dielectric substrate with at least one of another photonic integrated circuit disposed on the dielectric substrate or an optical device disposed on the dielectric substrate; and a metal interconnect disposed through the dielectric substrate to electrically couple the photonic integrated circuit disposed on the one side of the dielectric substrate with an electronic integrated circuit disposed on the other side of the dielectric substrate.

    Feedback controlled closed loop on-chip isolator
    8.
    发明授权
    Feedback controlled closed loop on-chip isolator 有权

    公开(公告)号：US09897827B1

    公开(公告)日：2018-02-20

    申请号：US15221436

    申请日：2016-07-27

    Applicant: Intel Corporation

    Inventor： Woosung Kim ,  Haisheng Rong ,  John Heck

    IPC: G02B6/27 ,  G02F1/095 ,  G02F1/09

    CPC classification number: G02F1/0955 ,  G02B6/2746 ,  G02F1/092

    Abstract: Embodiments herein relate to a photonic integrated circuit (PIC) with an on-chip optical isolator. The PIC may comprise a laser, a waveguide coupled with the laser, and a closed loop resonator coupled to the laser through the waveguide. A magneto-optical (MO) layer is over and in contact with the waveguide and the closed loop resonator. The closed loop resonator may comprise a first polarization rotator (PR) and a second PR. A light from the laser in transverse electric (TE) mode through the waveguide is rotated in the first PR to a light in transverse magnetic (TM) mode, and the light in TM mode is rotated in the second PR to light in TE mode. The isolator may further comprise a micro-heater over or along a side of the waveguide and separated from the closed loop resonator; and a feedback control loop connected to the closed loop resonator and the micro-heater.

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