公开(公告)号：US11335885B2

公开(公告)日：2022-05-17

申请号：US16922236

申请日：2020-07-07

Applicant: Japan Display Inc.

Inventor： Satoshi Maruyama

IPC: H01L51/52 ,  H01L51/56

Abstract: The display device includes a substrate including a first resin layer, a second resin layer overlapping the first resin layer, and a first inorganic insulating layer between the first resin layer and the second resin layer, and having flexibility, a display region provided on the substrate, a terminal region arranged outside the display region on the substrate, and a bending region arranged between the display region and the terminal region. A thickness of the second resin layer is larger than a thickness of the first resin layer. The substrate includes a first region and a second region. The first resin layer, the first inorganic insulating layer, and the second resin layer are laminated in the first region. The first resin layer and the second resin layer are laminated in the second region and the first inorganic insulating layer is not laminated in the second region.

公开(公告)号：US10886351B2

公开(公告)日：2021-01-05

申请号：US16263635

申请日：2019-01-31

Applicant: Japan Display Inc.

Inventor： Satoshi Maruyama

IPC: H01L27/00 ,  H01L27/32 ,  H01L27/12 ,  H01L27/06 ,  H01L29/66 ,  H01L29/786

Abstract: A plurality of thin film transistors provided in a peripheral region are first staggered thin film transistors where a first channel layer configured of low-temperature polysilicon is included, and the first channel layer is not interposed between a first source electrode and a first gate electrode, and between a first drain electrode and the first gate electrode. A plurality of thin film transistors provided in a display region are second staggered thin film transistors where a second channel layer configured of an oxide semiconductor is included, and the second channel layer is not interposed between a second source electrode and a second gate electrode, and between a second drain electrode and the second gate electrode. The first thin film transistor is located below the second thin film transistor.

公开(公告)号：US10236330B2

公开(公告)日：2019-03-19

申请号：US15426606

申请日：2017-02-07

Applicant: Japan Display Inc.

Inventor： Satoshi Maruyama

IPC: H01L27/32 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786

Abstract: A plurality of thin film transistors provided in a peripheral region are first staggered thin film transistors where a first channel layer configured of low-temperature polysilicon is included, and the first channel layer is not interposed between a first source electrode and a first gate electrode, and between a first drain electrode and the first gate electrode. A plurality of thin film transistors provided in a display region are second staggered thin film transistors where a second channel layer configured of an oxide semiconductor is included, and the second channel layer is not interposed between a second source electrode and a second gate electrode, and between a second drain electrode and the second gate electrode. The first thin film transistor is located below the second thin film transistor.

公开(公告)号：US20180019431A1

公开(公告)日：2018-01-18

申请号：US15608479

申请日：2017-05-30

Applicant: Japan Display Inc.

Inventor： Kohei KURATA ,  Satoshi Maruyama

IPC: H01L51/50 ,  H01L51/52 ,  H01L27/32

Abstract: A display device according to the present invention includes a substrate, and a plurality of pixels arranged in the substrate, wherein each of the plurality of pixels includes a light emitting element, a first transistor, a second transistor, a first insulation layer and a second insulation layer, the first transistor includes a first semiconductor layer, the second transistor includes a second semiconductor layer, the first insulation layer is arranged across the plurality of pixels between the first semiconductor layer and the second semiconductor layer, the second insulation layer is arranged between the first insulation layer and the second semiconductor layer, the first semiconductor layer is arranged on the substrate side sandwiching the first insulation layer with respect to the second semiconductor layer, the first insulation layer includes a silicon oxide layer; and the second insulation layer includes an aluminum oxide layer.

公开(公告)号：US20140225819A1

公开(公告)日：2014-08-14

申请号：US14171053

申请日：2014-02-03

Applicant: Japan Display Inc.

Inventor： Takahiro ONUMA ,  Kenji Harada ,  Satoshi Maruyama

IPC: G09G3/36 ,  G09G3/20

CPC classification number: G09G3/3648 ,  G09G3/3614 ,  G09G2300/0426 ,  G09G2310/0205 ,  G09G2310/0213 ,  G09G2310/0251

Abstract: Data lines are connected to pixels arranged on both sides of the data lines respectively, a cth gate line and a (c+1)th gate line are connected respectively to pixels arranged between the cth gate line and the (c+1)th gate line alternately, in the case of displaying an image at a Nth frame, the first gate line driver circuit and the second gate line driver circuit supply the gate signal to the cth gate line and the (c+1)th gate line in this order, and in the case of displaying an image at a (N+1)th frame, the first gate line driver circuit and the second gate line driver circuit supply the gate signal to the (c+1)th gate line and the cth gate line in this order.

Abstract translation: 数据线分别连接到排列在数据线两侧的像素，第c栅极线和第（c + 1）栅极线分别连接到布置在第c栅极线和第（c + 1）栅极之间的像素 在第N帧显示图像的情况下，第一栅极线驱动电路和第二栅极线驱动电路按照该顺序向第c栅极线和第（c + 1）栅极线提供栅极信号 并且在第（N + 1）帧显示图像的情况下，第一栅极线驱动电路和第二栅极线驱动电路向第（c + 1）栅极线和第C栅极提供栅极信号 按此顺序排列。

公开(公告)号：US10826008B2

公开(公告)日：2020-11-03

申请号：US16594143

申请日：2019-10-07

Applicant: Japan Display Inc.

Inventor： Kohei Kurata ,  Satoshi Maruyama

IPC: H01L27/12 ,  H01L51/50 ,  H01L27/32 ,  H01L51/52

Abstract: A display device according to the present invention includes a substrate, and a plurality of pixels arranged in the substrate, wherein each of the plurality of pixels includes a light emitting element, a first transistor, a second transistor, a first insulation layer and a second insulation layer, the first transistor includes a first semiconductor layer, the second transistor includes a second semiconductor layer, the first insulation layer is arranged across the plurality of pixels between the first semiconductor layer and the second semiconductor layer, the second insulation layer is arranged between the first insulation layer and the second semiconductor layer, the first semiconductor layer is arranged on the substrate side sandwiching the first insulation layer with respect to the second semiconductor layer, the first insulation layer includes a silicon oxide layer; and the second insulation layer includes an aluminum oxide layer.

公开(公告)号：US12108624B2

公开(公告)日：2024-10-01

申请号：US18354745

申请日：2023-07-19

Applicant: Japan Display Inc.

Inventor： Satoshi Maruyama

IPC: H10K50/844 ,  H10K50/842 ,  H10K71/00 ,  H10K102/00

CPC classification number: H10K50/844 ,  H10K50/8426 ,  H10K71/00 ,  H10K2102/00 ,  H10K2102/311

Abstract: The display device includes a substrate including a first resin layer, a second resin layer overlapping the first resin layer, and a first inorganic insulating layer between the first resin layer and the second resin layer, and having flexibility, a display region provided on the substrate, a terminal region arranged outside the display region on the substrate, and a bending region arranged between the display region and the terminal region. A thickness of the second resin layer is larger than a thickness of the first resin layer. The substrate includes a first region and a second region. The first resin layer, the first inorganic insulating layer, and the second resin layer are laminated in the first region. The first resin layer and the second resin layer are laminated in the second region and the first inorganic insulating layer is not laminated in the second region.

公开(公告)号：US11758758B2

公开(公告)日：2023-09-12

申请号：US17689375

申请日：2022-03-08

Applicant: Japan Display Inc.

Inventor： Satoshi Maruyama

IPC: H10K50/844 ,  H10K50/842 ,  H10K71/00 ,  H10K102/00

CPC classification number: H10K50/844 ,  H10K50/8426 ,  H10K71/00 ,  H10K2102/00 ,  H10K2102/311

Abstract: The display device includes a substrate including a first resin layer, a second resin layer overlapping the first resin layer, and a first inorganic insulating layer between the first resin layer and the second resin layer, and having flexibility, a display region provided on the substrate, a terminal region arranged outside the display region on the substrate, and a bending region arranged between the display region and the terminal region. A thickness of the second resin layer is larger than a thickness of the first resin layer. The substrate includes a first region and a second region. The first resin layer, the first inorganic insulating layer, and the second resin layer are laminated in the first region. The first resin layer and the second resin layer are laminated in the second region and the first inorganic insulating layer is not laminated in the second region.

公开(公告)号：US10476020B2

公开(公告)日：2019-11-12

申请号：US15608479

申请日：2017-05-30

Applicant: Japan Display Inc.

Inventor： Kohei Kurata ,  Satoshi Maruyama

IPC: H01L51/50 ,  H01L51/52 ,  H01L27/32 ,  H01L27/12

Abstract: A display device according to the present invention includes a substrate, and a plurality of pixels arranged in the substrate, wherein each of the plurality of pixels includes a light emitting element, a first transistor, a second transistor, a first insulation layer and a second insulation layer, the first transistor includes a first semiconductor layer, the second transistor includes a second semiconductor layer, the first insulation layer is arranged across the plurality of pixels between the first semiconductor layer and the second semiconductor layer, the second insulation layer is arranged between the first insulation layer and the second semiconductor layer, the first semiconductor layer is arranged on the substrate side sandwiching the first insulation layer with respect to the second semiconductor layer, the first insulation layer includes a silicon oxide layer; and the second insulation layer includes an aluminum oxide layer.

公开(公告)号：US12058893B2

公开(公告)日：2024-08-06

申请号：US18347778

申请日：2023-07-06

Applicant: Japan Display Inc.

Inventor： Satoshi Maruyama

IPC: H01L27/00 ,  H01L27/12 ,  H10K59/121 ,  H10K59/131 ,  H01L27/06 ,  H01L29/66 ,  H01L29/786 ,  H10K59/12

CPC classification number: H10K59/1213 ,  H01L27/1225 ,  H01L27/1251 ,  H01L27/1255 ,  H01L27/1259 ,  H10K59/1216 ,  H10K59/131 ,  H01L27/0688 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1262 ,  H01L29/66757 ,  H01L29/66969 ,  H01L29/78675 ,  H01L29/7869 ,  H10K59/1201

Abstract: A plurality of thin film transistors provided in a peripheral region are first staggered thin film transistors where a first channel layer configured of low-temperature polysilicon is included, and the first channel layer is not interposed between a first source electrode and a first gate electrode, and between a first drain electrode and the first gate electrode. A plurality of thin film transistors provided in a display region are second staggered thin film transistors where a second channel layer configured of an oxide semiconductor is included, and the second channel layer is not interposed between a second source electrode and a second gate electrode, and between a second drain electrode and the second gate electrode. The first thin film transistor is located below the second thin film transistor.