公开(公告)号：US20230197857A1

公开(公告)日：2023-06-22

申请号：US17842457

申请日：2022-06-16

Applicant: Kioxia Corporation

Inventor： Taro SHIOKAWA ,  Kiwamu SAKUMA ,  Keiko SAKUMA ,  Mutsumi OKAJIMA ,  Kazuhiro MATSUO ,  Masaya TODA

IPC: H01L29/786 ,  H01L27/108 ,  H01L29/66

CPC classification number: H01L29/78642 ,  H01L27/1082 ,  H01L29/7869 ,  H01L29/66969 ,  H01L27/10873

Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; an oxide semiconductor layer between the first electrode and the second electrode and including a first region surrounded by the first electrode in a plane perpendicular to a first direction from the first electrode toward the second electrode; a gate electrode facing the oxide semiconductor layer; a gate insulating layer; a first insulating layer between the gate electrode and the first electrode; and a second insulating layer between the gate electrode and the second electrode. A first maximum distance between a first portion of the first electrode and a second portion of the first electrode in a second direction in a cross section parallel to the first direction is larger than a minimum distance between a third portion of the first insulating layer and a fourth portion of the first insulating layer in the second direction.

公开(公告)号：US20220093151A1

公开(公告)日：2022-03-24

申请号：US17199726

申请日：2021-03-12

Applicant: Kioxia Corporation

Inventor： Kunifumi SUZUKI ,  Kiwamu SAKUMA

IPC: G11C11/22 ,  H01L27/11514 ,  H01L27/11597

Abstract: A semiconductor memory device includes a first memory transistor, a first memory capacitor, and a control circuit connected to them. The first memory transistor includes a first gate electrode, a first semiconductor layer, and a first insulating film containing an insulating material. The first memory capacitor includes a first electrode, a second electrode, and a second insulating film containing the insulating material of the first insulating film. The control circuit is configured to perform a first program operation that supplies the first gate electrode with a first program voltage, a second program operation that supplies the first gate electrode with a second program voltage larger than the first program voltage, and a first read operation that supplies at least one of the first electrode or the second electrode with a voltage. The control circuit performs the first or the second program operation after performing the first read operation.

公开(公告)号：US20240324238A1

公开(公告)日：2024-09-26

申请号：US18589342

申请日：2024-02-27

Applicant: Kioxia Corporation

Inventor： Reika TANAKA ,  Kunifumi SUZUKI ,  Kiwamu SAKUMA ,  Yoko YOSHIMURA ,  Takamasa HAMAI ,  Kensuke OTA ,  Yusuke HIGASHI ,  Yoshiaki ASAO ,  Masamichi SUZUKI

IPC: H10B53/30

CPC classification number: H10B53/30

Abstract: A storage device includes a first electrode, a second electrode, a first dielectric layer between the first and second electrodes and including oxygen and at least one of hafnium and zirconium, a second dielectric layer between the first electrode and the first dielectric layer, and an intermediate region between the first and second dielectric layers and in which a plurality of metallic portions are provided.

公开(公告)号：US20230299206A1

公开(公告)日：2023-09-21

申请号：US17899909

申请日：2022-08-31

Applicant: Kioxia Corporation

Inventor： Keiko SAKUMA ,  Taro SHIOKAWA ,  Kiwamu SAKUMA

IPC: H01L29/786 ,  H01L27/108

CPC classification number: H01L29/7869 ,  H01L29/78609 ,  H01L27/10805

Abstract: A semiconductor device includes: a first electrode; a second electrode; a first oxide semiconductor layer provided between the first electrode and the second electrode; a gate electrode around the first oxide semiconductor layer; a second oxide semiconductor layer provided between the gate electrode and the first oxide semiconductor layer, and separated from the first electrode; and a gate insulating layer provided between the gate electrode and the second oxide semiconductor layer.

公开(公告)号：US20240315041A1

公开(公告)日：2024-09-19

申请号：US18593981

申请日：2024-03-04

Applicant: Kioxia Corporation

Inventor： Kiwamu SAKUMA ,  Takamasa HAMAI ,  Yuuichi KAMIMUTA ,  Kunifumi SUZUKI

IPC: H10B51/20 ,  H10B51/30

CPC classification number: H10B51/20 ,  H10B51/30

Abstract: A semiconductor memory device has a stacked body in which a plurality of electrode layers and a plurality of insulating layers are alternately stacked in a first direction, an electrode film that extends in the stacked body in the first direction, and a plurality of ferroelectric films. Each of the ferroelectric films is disposed between and in contact with one of the electrode layers and the electrode film, and has a thickness in the first direction that is greater than the electrode layer that is in contact therewith.

公开(公告)号：US20230328957A1

公开(公告)日：2023-10-12

申请号：US17929422

申请日：2022-09-02

Applicant: Kioxia Corporation

Inventor： Masaya TODA ,  Tomoki ISHIMARU ,  Ha HOANG ,  Kota TAKAHASHI ,  Kazuhiro MATSUO ,  Takafumi OCHIAI ,  Shoji HONDA ,  Kenichiro TORATANI ,  Kiwamu SAKUMA ,  Taro SHIOKAWA ,  Mutsumi OKAJIMA

IPC: H01L27/108

CPC classification number: H01L27/10805

Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; an oxide semiconductor layer provided between the first electrode and the second electrode; a gate electrode surrounding the oxide semiconductor layer; and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer, spaced from the first electrode, and containing nitrogen (N). In addition, a first distance between the first electrode and the gate insulating layer in a first direction from the first electrode to the second electrode is smaller than a second distance between the first electrode and the gate electrode in the first direction.

公开(公告)号：US20220093149A1

公开(公告)日：2022-03-24

申请号：US17189097

申请日：2021-03-01

Applicant: KIOXIA CORPORATION

Inventor： Haruka SAKUMA ,  Kiwamu SAKUMA ,  Masumi SAITOH

IPC: G11C11/22 ,  H01L27/11587 ,  H01L27/1159 ,  H01L27/11592 ,  H01L29/51

Abstract: A semiconductor storage device includes a plurality of gate electrodes, a semiconductor layer facing the plurality of gate electrodes, a gate insulating layer arranged between each of the plurality of gate electrodes and the semiconductor layer. The gate insulating layer contains oxygen (O) and hafnium (Hf) and has an orthorhombic crystal structure. A plurality of first wirings is connected to the respective gate electrodes. A controller is configured to execute a write sequence and an erasing sequence by applying certain voltages to at least one of the first wirings. The controller is further configured to increase either a program voltage to be applied to the first wirings in the write sequence or an application time of the program voltage in the write sequence after a total number of executions of the write sequence or the erasing sequence has reached a particular number.

公开(公告)号：US20210066316A1

公开(公告)日：2021-03-04

申请号：US16804403

申请日：2020-02-28

Applicant: Kioxia Corporation

Inventor： Kensuke OTA ,  Masumi SAITOH ,  Kiwamu SAKUMA

IPC: H01L27/1157 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11539 ,  H01L27/11529

Abstract: A semiconductor memory device includes a substrate, a plurality of conductive layers, a first semiconductor layer, a memory portion, and a drive circuit which drives the memory cell. The conductive layers are provided in a first region, a second region, and a third region different from the first region and the second region, and a portion positioned in the third region is insulated from a portion positioned in the first region and the second region. The drive circuit is provided in the third region, and includes a second semiconductor layer, and an insulating layer, and one end of the second semiconductor layer is connected to the conductive layers in the second region and the other end of the second semiconductor layer is connected to the substrate.