公开(公告)号：US20050080762A1

公开(公告)日：2005-04-14

申请号：US10961299

申请日：2004-10-08

申请人： Katsuya Nakashima ,  Hideki Hara ,  Takashi Akai ,  Toshifumi Nomura ,  Kazumi Sato ,  Yukihisa Tsuneda ,  Toshiyuki Nishihara

发明人： Katsuya Nakashima ,  Hideki Hara ,  Takashi Akai ,  Toshifumi Nomura ,  Kazumi Sato ,  Yukihisa Tsuneda ,  Toshiyuki Nishihara

IPC分类号： G06F12/16 ,  G06F3/06 ,  G06F11/14 ,  G06F12/00 ,  G11B20/10 ,  G11B27/00 ,  G11C13/00 ,  G06F7/00

CPC分类号： G06F11/1435 ,  G11C13/0007 ,  G11C2213/31

摘要： A file storage apparatus capable of restoring integrity of file management information even when a power supply abnormality occurs without lowering the write speed. When updating meta data stored in an HDD, log data for reconstructing the meta data after update from the meta data before update is written into a non-volatile RAM (NVRAM), then, after this writing is completed, the update is executed. Accordingly, even when the update use meta data temporarily stored in a cache memory is partially lost due to trouble such as a power supply abnormality and when update of the meta data of a hard disk is incomplete, the log data corresponding to the meta data for the update is held in the NVRAM, so it becomes possible to restore the integrity of the meta data on the hard disk by using this log data.

摘要翻译： 即使在电源异常发生而不降低写入速度的情况下，也能够恢复文件管理信息的完整性的文件存储装置。 当更新存储在HDD中的元数据时，用于将更新后的元数据重新构建的更新前的元数据的日志数据写入非易失性RAM（NVRAM）中，则在写入完成之后，执行更新。 因此，即使当由于诸如电源异常的故障而暂时存储在高速缓冲存储器中的元数据部分地丢失，并且当硬盘的元数据的更新不完整时，即使对应于用于 该更新被保存在NVRAM中，因此可以通过使用该日志数据恢复硬盘上的元数据的完整性。

公开(公告)号：US07640388B2

公开(公告)日：2009-12-29

申请号：US10961299

申请日：2004-10-08

申请人： Katsuya Nakashima ,  Hideki Hara ,  Takashi Akai ,  Toshifumi Nomura ,  Kazumi Sato ,  Yukihisa Tsuneda ,  Toshiyuki Nishihara

发明人： Katsuya Nakashima ,  Hideki Hara ,  Takashi Akai ,  Toshifumi Nomura ,  Kazumi Sato ,  Yukihisa Tsuneda ,  Toshiyuki Nishihara

IPC分类号： G06F13/10

CPC分类号： G06F11/1435 ,  G11C13/0007 ,  G11C2213/31

摘要： A file storage apparatus capable of restoring integrity of file management information even when a power supply abnormality occurs without lowering the write speed. When updating meta data stored in an HDD, log data for reconstructing the meta data after update from the meta data before update is written into a non-volatile RAM (NVRAM), then, after this writing is completed, the update is executed. Accordingly, even when the update use meta data temporarily stored in a cache memory is partially lost due to trouble such as a power supply abnormality and when update of the meta data of a hard disk is incomplete, the log data corresponding to the meta data for the update is held in the NVRAM, so it becomes possible to restore the integrity of the meta data on the hard disk by using this log data.

摘要翻译： 即使在电源异常发生而不降低写入速度的情况下，也能够恢复文件管理信息的完整性的文件存储装置。 当更新存储在HDD中的元数据时，用于将更新后的元数据重新构建的更新前的元数据的日志数据写入非易失性RAM（NVRAM）中，则在写入完成之后，执行更新。 因此，即使当由于诸如电源异常的故障而暂时存储在高速缓冲存储器中的元数据部分地丢失，并且当硬盘的元数据的更新不完整时，即使对应于用于 该更新被保存在NVRAM中，因此可以通过使用该日志数据恢复硬盘上的元数据的完整性。

公开(公告)号：US06924807B2

公开(公告)日：2005-08-02

申请号：US09815781

申请日：2001-03-23

申请人： Hitoshi Ebihara ,  Kazumi Sato ,  Masakazu Mokuno ,  Hideki Hara

发明人： Hitoshi Ebihara ,  Kazumi Sato ,  Masakazu Mokuno ,  Hideki Hara

IPC分类号： G06T1/20 ,  G09G5/393 ,  G06F15/16

CPC分类号： G09G5/393 ,  G06T1/20

摘要： An apparatus for processing image data to produce an image for covering an image area of a display includes a plurality of graphics processors, each graphics processor being operable to render the image data into frame image data and to store the frame image data in a respective local frame buffer; a control processor operable to provide instructions to the plurality of graphics processors; and at least one merge unit operable to synchronously receive the frame image data from the respective local frame buffers and to synchronously produce combined frame image data based thereon.

摘要翻译： 用于处理图像数据以产生用于覆盖显示器的图像区域的图像的装置包括多个图形处理器，每个图形处理器可操作以将图像数据呈现为帧图像数据并将帧图像数据存储在相应的本地 帧缓冲区 控制处理器，可操作以向所述多个图形处理器提供指令; 以及至少一个合并单元，其可操作以从各个本地帧缓冲器同步地接收帧图像数据，并且基于此同步产生组合的帧图像数据。

公开(公告)号：US20120083112A1

公开(公告)日：2012-04-05

申请号：US13324614

申请日：2011-12-13

申请人： Hideki SUGIYAMA ,  Hideki Hara

发明人： Hideki SUGIYAMA ,  Hideki Hara

IPC分类号： H01L21/28

CPC分类号： H01L27/115 ,  H01L27/11568

摘要： A nonvolatile semiconductor memory comprises a first memory cell transistor, a second memory cell transistor, a connection layer, protrusion portions and a contact portion. The first memory cell transistor comprises a first gate electrode formed above a first channel region, and a second gate electrode formed on a side of the first gate electrode through an insulating film. The second memory cell transistor comprises a third gate electrode formed above a second channel region, and a fourth gate electrode formed on a side of the third gate electrode through an insulating film and facing the second gate electrode. The connection layer connects the second gate electrode and the fourth gate electrode. The protrusion portions are formed of a material different than that of the second and fourth gate electrodes, and are formed on both ends of the connection layer. The contact portion is formed on the connection layer.

摘要翻译： 非易失性半导体存储器包括第一存储单元晶体管，第二存储单元晶体管，连接层，突出部分和接触部分。 第一存储单元晶体管包括形成在第一沟道区上方的第一栅电极和通过绝缘膜形成在第一栅电极侧的第二栅电极。 第二存储单元晶体管包括形成在第二沟道区上方的第三栅极电极和通过绝缘膜形成在面向第二栅电极的第三栅电极侧的第四栅电极。 连接层连接第二栅电极和第四栅电极。 突起部由不同于第二和第四栅电极的材料形成，并且形成在连接层的两端。 接触部分形成在连接层上。

公开(公告)号：US20100213597A1

公开(公告)日：2010-08-26

申请号：US12682649

申请日：2008-10-15

申请人： Mitsuo Sugino ,  Hideki Hara ,  Toru Meura

发明人： Mitsuo Sugino ,  Hideki Hara ,  Toru Meura

IPC分类号： H01L23/48 ,  H01L23/31

CPC分类号： H01L23/3735 ,  H01L23/49833 ,  H01L23/5389 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K3/284 ,  H05K2203/1322 ,  H01L2924/00

摘要： A semiconductor element mounting board includes: aboard having surfaces; a semiconductor element mounted on one of the surfaces of the board; a first layer into which the semiconductor element is embedded, the first layer being provided on the one surface of the board; a second layer provided on the other surface of the board, the second layer being constituted from the same material as that of the first layer, the constituent material of the second layer having the same composition ratio as that of the constituent material of the first layer; and surface layers provided on the first and second layers, respectively, each of the surface layers being formed from at least a single layer. In such a semiconductor element mounting board, each of the surface layers has rigidity higher than that of each of the first and second layers. It is preferred that in the case where a Young's modulus of each surface layer at 25° C. is defined as X GPa and a Young's modulus of the first layer at 25° C. is defined as Y GPa, the X and the Y satisfy a relation of 0.5≦X−Y≦13.

摘要翻译： 半导体元件安装板包括：具有表面; 安装在所述板的一个表面上的半导体元件; 第一层，半导体元件被嵌入其中，第一层设置在板的一个表面上; 设置在所述板的另一个表面上的第二层，所述第二层由与所述第一层相同的材料构成，所述第二层的构成材料具有与所述第一层的构成材料相同的组成比 ; 以及分别设置在第一和第二层上的表面层，每个表面层由至少单层形成。 在这样的半导体元件安装基板中，每个表面层的刚性比第一和第二层的刚性要高。 优选的是，将25℃下的各表面层的杨氏模量定义为X GPa，在25℃下将第一层的杨氏模量定义为YGPa的情况下，X和Y满足 关系为0.5＆nlE; X-Y＆nlE; 13。

公开(公告)号：US20090293803A1

公开(公告)日：2009-12-03

申请号：US12457066

申请日：2009-06-01

申请人： Takanori Tsurumaru ,  Hideki Hara ,  Ryoichi Kaito

发明人： Takanori Tsurumaru ,  Hideki Hara ,  Ryoichi Kaito

IPC分类号： C30B15/22

CPC分类号： C30B30/04 ,  C30B15/22 ,  C30B15/305 ,  C30B29/06

摘要： By providing a length of not less than 100 mm to a tail portion to be formed following the cylindrical body portion in growing silicon single crystals having a cylindrical body portion with a diameter of 450 mm using the CZ method, it becomes possible to inhibit the occurrence of dislocations in the tail portion and thus achieve improvements in yield and productivity. A transverse magnetic field having an intensity of not less than 0.1 T is preferably applied on the occasion of formation of that tail portion.

摘要翻译： 通过使用CZ方法，在生长的具有直径为450mm的圆筒体部分的硅单晶中的圆柱体部分之后形成不小于100mm的长度，可以抑制发生 从而实现产量和生产率的提高。 在形成该尾部的场合，优选施加强度不小于0.1T的横向磁场。

公开(公告)号：US20060011971A1

公开(公告)日：2006-01-19

申请号：US11176157

申请日：2005-07-08

申请人： Hideki Hara

发明人： Hideki Hara

IPC分类号： H01L29/788

CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L29/42328 ,  H01L29/42336

摘要： A nonvolatile semiconductor memory device has a substrate, a floating gate, a buried gate, a control gate, and source/drain regions. The substrate has a trench formed in a first direction. The floating gate is formed on a surface of the substrate outside the trench through a first gate insulating film. The buried gate is formed on a surface of the trench through a second gate insulating film. The control gate is formed to cover the floating gate through a third gate insulating film. The source/drain regions are formed in the substrate below the floating gate.

摘要翻译： 非易失性半导体存储器件具有衬底，浮置栅极，掩埋栅极，控制栅极和源极/漏极区域。 衬底具有沿第一方向形成的沟槽。 浮置栅极通过第一栅极绝缘膜形成在沟槽外部的衬底的表面上。 掩埋栅极通过第二栅极绝缘膜形成在沟槽的表面上。 控制栅极形成为通过第三栅极绝缘膜覆盖浮置栅极。 源极/漏极区域形成在浮置栅极下方的衬底中。

公开(公告)号：US6090667A

公开(公告)日：2000-07-18

申请号：US190205

申请日：1998-11-13

申请人： Hideki Hara

发明人： Hideki Hara

IPC分类号： H01L21/28 ,  H01L21/822 ,  H01L21/8234 ,  H01L21/8247 ,  H01L27/04 ,  H01L27/088 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L27/11526 ,  H01L27/115 ,  H01L27/11531

摘要： A semiconductor device includes a field oxide film, a plurality of word lines, an insulating interlayer film, a plurality of contact holes, a plurality of protective diffusion layers, a plurality of common contact holes, and a plurality of metal plugs. The field oxide film is formed on a silicon substrate having one conductivity type. The word lines are formed by patterning on the field oxide film. The insulating interlayer film is formed on the field oxide film to cover the word lines. The contact holes are formed in the field oxide film to be self-aligned with the word lines. The protective diffusion layers have an opposite conductivity type and are formed on a surface of the semiconductor substrate to correspond to the contact holes. The common contact holes are formed in the insulating interlayer film to extend across the word lines and the protective diffusion layers. The common contact holes are formed at a depth to reach the protective diffusion layers while partly exposing the word lines. The metal plugs fill the common contact holes to electrically connect the protective diffusion layers and the word lines with each other. A method of manufacturing a semiconductor device is also disclosed.

摘要翻译： 半导体器件包括场氧化膜，多个字线，绝缘层间膜，多个接触孔，多个保护性扩散层，多个公共接触孔和多个金属插塞。 场氧化膜形成在具有一种导电类型的硅衬底上。 字线通过在场氧化膜上图案化而形成。 绝缘层间膜形成在场氧化膜上以覆盖字线。 接触孔形成在场氧化膜中以与字线自对准。 保护性扩散层具有相反的导电型，并且形成在半导体衬底的与接触孔相对应的表面上。 公共接触孔形成在绝缘层间膜中，以跨越字线和保护扩散层延伸。 常见的接触孔形成在深度上以到达保护性扩散层，同时部分地暴露字线。 金属插头填充公共接触孔，以将保护性扩散层和字线彼此电连接。 还公开了半导体器件的制造方法。

公开(公告)号：US5492846A

公开(公告)日：1996-02-20

申请号：US334318

申请日：1994-11-01

申请人： Hideki Hara

发明人： Hideki Hara

IPC分类号： G11C17/00 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L27/11521

摘要： A fabrication method of a split-gate type flash EEPROM with an improved data-storage characteristic. Insulator strips extending along a first direction are formed on a semiconductor substrate at intervals. The strips are in contact with active regions and a field insulator film. After a first gate insulator film is formed on uncovered parts of the active regions, respectively, a first patterned conductor film is formed to cover the insulator strips and the first gate insulator film. The first conductor film is anisotropically etched to produce floating gate electrodes lower in height than the stripes on the first gate insulator film without using a mask. Each of the floating gate electrodes has an oblique side face. A second gate insulator film is formed to cover the floating gate electrodes and exposed parts of the active regions. A second conductor film is formed to cover the second gate insulator film and the insulator strips. The second conductor film is etched back to flatten a surface of the second conductor film until tops of the strips are exposed. The second conductor film is patterned to produce control gate electrodes. After the insulator strips are removed, drain regions and source regions are formed in the active regions respectively.

摘要翻译： 具有改进的数据存储特性的分闸式快闪EEPROM的制造方法。 间隔地在半导体衬底上形成沿着第一方向延伸的绝缘体条。 条带与有源区和场绝缘膜接触。 在分别在有源区的未覆盖部分上形成第一栅极绝缘膜之后，形成第一图案化导体膜以覆盖绝缘体条和第一栅极绝缘膜。 第一导体膜被各向异性地蚀刻以产生高于第一栅极绝缘膜上的条纹的浮动栅电极，而不使用掩模。 每个浮栅电极具有倾斜的侧面。 形成第二栅极绝缘膜以覆盖浮动栅电极和有源区的暴露部分。 形成第二导体膜以覆盖第二栅极绝缘膜和绝缘体条。 将第二导体膜回蚀刻以使第二导体膜的表面变平，直到条的顶部露出。 图案化第二导体膜以产生控制栅电极。 在去除绝缘体条之后，分别在有源区中形成漏区和源极区。

公开(公告)号：US08815675B2

公开(公告)日：2014-08-26

申请号：US13324614

申请日：2011-12-13

申请人： Hideki Sugiyama ,  Hideki Hara

发明人： Hideki Sugiyama ,  Hideki Hara

IPC分类号： H01L31/072

CPC分类号： H01L27/115 ,  H01L27/11568

摘要： A nonvolatile semiconductor memory comprises a first memory cell transistor, a second memory cell transistor, a connection layer, protrusion portions and a contact portion. The first memory cell transistor comprises a first gate electrode formed above a first channel region, and a second gate electrode formed on a side of the first gate electrode through an insulating film. The second memory cell transistor comprises a third gate electrode formed above a second channel region, and a fourth gate electrode formed on a side of the third gate electrode through an insulating film and facing the second gate electrode. The connection layer connects the second gate electrode and the fourth gate electrode. The protrusion portions are formed of a material different than that of the second and fourth gate electrodes, and are formed on both ends of the connection layer. The contact portion is formed on the connection layer.

摘要翻译： 非易失性半导体存储器包括第一存储单元晶体管，第二存储单元晶体管，连接层，突出部分和接触部分。 第一存储单元晶体管包括形成在第一沟道区上方的第一栅电极和通过绝缘膜形成在第一栅电极侧的第二栅电极。 第二存储单元晶体管包括形成在第二沟道区上方的第三栅极电极和通过绝缘膜形成在面向第二栅电极的第三栅电极侧的第四栅电极。 连接层连接第二栅电极和第四栅电极。 突起部由不同于第二和第四栅电极的材料形成，并且形成在连接层的两端。 接触部分形成在连接层上。