公开(公告)号：US20230422484A1

公开(公告)日：2023-12-28

申请号：US17984535

申请日：2022-11-10

Applicant: Kioxia Corporation

Inventor： Tatsuki KIKUCHI ,  Keiko SAKUMA ,  Shosuke FUJII

IPC: H01L27/108 ,  H01L29/786

CPC classification number: H01L27/10838 ,  H01L29/7869 ,  H01L27/1087

Abstract: According to one embodiment, a semiconductor device includes a first insulating layer, a gate electrode layer provided on the first insulating layer, a second insulating layer provided on the gate electrode layer, an oxide semiconductor layer provided along the second insulating layer, the gate electrode layer and the first insulating layer, a gate insulating layer provided along the second insulating layer, the gate electrode layer and the first insulating layer, and surrounding a side surface of the oxide semiconductor layer, and a first hydrogen barrier film surrounding the oxide semiconductor layer and the gate insulating layer.

公开(公告)号：US20250089237A1

公开(公告)日：2025-03-13

申请号：US18595558

申请日：2024-03-05

Applicant: Kioxia Corporation

Inventor： Takeru MAEDA ,  Shosuke FUJII ,  Kotaro NODA

IPC: H10B12/00

Abstract: A semiconductor device includes: an oxide semiconductor including a first end and a second end and extending in a first direction oriented from the second end to the first end; a first electrode configured to come into contact with the first end of the oxide semiconductor; a second electrode configured to come into contact with the second end of the oxide semiconductor; a gate electrode configured to enclose the oxide semiconductor with a first insulating film interposed therebetween between the first and second ends of the oxide semiconductor; and a metal film including a cylindrical portion that comes into contact with the gate electrode in the first direction and encloses the oxide semiconductor with the first insulating film interposed therebetween.

公开(公告)号：US20230422482A1

公开(公告)日：2023-12-28

申请号：US18338837

申请日：2023-06-21

Applicant: Kioxia Corporation

Inventor： Shosuke FUJII ,  Kotaro NODA

IPC: H10B12/00

CPC classification number: H10B12/33 ,  H10B12/05

Abstract: A semiconductor device according to an embodiment includes: a first electrode; a second electrode; a gate electrode between the first electrode and the second electrode; a first insulating layer; a second insulating layer; a gate insulating layer surrounding the gate electrode; an oxide semiconductor layer surrounding the gate insulating layer, the oxide semiconductor layer including a first region between the gate insulating layer and the first electrode, a second region between the gate insulating layer and the second electrode, a third region between the gate insulating layer and the first insulating layer, and a fourth region between the gate insulating layer and the second insulating layer. A first thickness of the first region and a second thickness of the second region are equal to or less than at least one of a third thickness of the third region or a fourth thickness of the fourth region.

公开(公告)号：US20240321995A1

公开(公告)日：2024-09-26

申请号：US18341865

申请日：2023-06-27

Applicant: Kioxia Corporation

Inventor： Masaya TODA ,  Kazuhiro MATSUO ,  Kota TAKAHASHI ,  Kenichiro TORATANI ,  Shosuke FUJII ,  Shoichi KABUYANAGI ,  Masayuki TANAKA ,  Wakako MORIYAMA

IPC: H01L29/49 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786 ,  H10B12/00

CPC classification number: H01L29/4908 ,  H01L29/66969 ,  H01L29/775 ,  H01L29/78696 ,  H10B12/30 ,  H10B12/33 ,  H01L29/0676 ,  H01L29/413 ,  H01L29/42392 ,  H01L29/7869

Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; an oxide semiconductor layer provided between the first electrode and the second electrode and including a first region, a second region, and a third region between the first region and the second region; a gate electrode facing the third region; a first insulating layer facing the first region; a second insulating layer facing the second region; and a gate insulating layer between the gate electrode and the oxide semiconductor layer, containing oxygen (O) and at least one metal element selected from a group consisting of Al, Hf, Zr, La, Y, Zn, In, Sn, and Ga, and having a chemical composition different from that of the oxide semiconductor layer.

公开(公告)号：US20240315043A1

公开(公告)日：2024-09-19

申请号：US18593989

申请日：2024-03-04

Applicant: Kioxia Corporation

Inventor： Shosuke FUJII

IPC: H10B51/30

CPC classification number: H10B51/30

Abstract: A semiconductor memory device includes a ferroelectric memory transistor. The ferroelectric memory transistor includes a first conductive layer extending in a first direction and having a cylindrical shape and an upper surface that has a diameter R1, a first semiconductor layer extending in the first direction and having a cylindrical base portion in contact with the upper surface of the first conductive layer, the cylindrical base portion extending further in a radial direction than the upper surface of the first conductive layer such that a diameter R2 thereof is greater than the diameter R1, a ferroelectric layer extending in the first direction and surrounded by the first semiconductor layer, a second conductive layer extending in the first direction and surrounded by the ferroelectric layer, and a third conductive layer in contact with an outer periphery of the first semiconductor layer.

公开(公告)号：US20240306368A1

公开(公告)日：2024-09-12

申请号：US18593988

申请日：2024-03-04

Applicant: Kioxia Corporation

Inventor： Takeru MAEDA ,  Kotaro NODA ,  Shosuke FUJII

IPC: H10B12/00

CPC classification number: H10B12/33 ,  H10B12/05

Abstract: A semiconductor device includes a semiconductor substrate, a memory capacitor provided on the semiconductor substrate, a first conductor provided above the memory capacitor and extending in a first direction, a second conductor provided above the first conductor and extending in the first direction, an oxide semiconductor layer provided between the first conductor and the second conductor and extending in the first direction, a conductive oxide layer between the second conductor and the oxide semiconductor layer, a first conductive layer between the conductive oxide layer and the second conductor, and an insulating layer in contact with the conductive oxide layer, wherein a portion of the conductive oxide layer is between and aligned with the first insulating layer and the oxide semiconductor layer in the first direction.

公开(公告)号：US20240057313A1

公开(公告)日：2024-02-15

申请号：US18179620

申请日：2023-03-07

Applicant: Kioxia Corporation

Inventor： Taro SHIOKAWA ,  Takeru MAEDA ,  Kotaro NODA ,  Shosuke FUJII

IPC: H10B12/00

CPC classification number: H10B12/33 ,  H10B12/05

Abstract: A semiconductor device includes a semiconductor substrate, a first layer formed on the semiconductor substrate and including a semiconductor element and a first insulating film, a second layer formed above the first layer and including a channel including an oxide semiconductor and a second insulating film, and a third layer formed above the second layer, and including an electrode formed on the channel and a third insulating film having a film density less than at least one of a film density of the first insulating film or a film density of the second insulating film.

公开(公告)号：US20230402395A1

公开(公告)日：2023-12-14

申请号：US18331519

申请日：2023-06-08

Applicant: Kioxia Corporation

Inventor： Kotaro NODA ,  Kyoko NODA ,  Shosuke FUJII ,  Yusuke ARAYASHIKI ,  Hiroyuki ODE

IPC: H01L23/544 ,  H10B63/10 ,  H10B63/00

CPC classification number: H01L23/544 ,  H10B63/10 ,  H10B63/24 ,  H10B63/80 ,  H01L2223/54426

Abstract: A semiconductor device includes: a semiconductor substrate including a first area and a second area; a plurality of memory cells provided in the first area; a mark provided in the second area and having a first side surface and a second side surface that intersects with the first side surface; and a plurality of patterns provided in the second area and provided on the first side surface and the second side surface.