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公开(公告)号:US11946142B2
公开(公告)日:2024-04-02
申请号:US17633942
申请日:2020-08-06
Applicant: Lam Research Corporation
Inventor: Fayaz A. Shaikh , Adriana Vintila , Matthew Mudrow , Nick Ray Linebarger, Jr. , Xin Yin , James F. Lee , Brian Joseph Williams
IPC: C23C16/455 , C23C16/04 , C23C16/44 , C23C16/458 , C23C16/509
CPC classification number: C23C16/4585 , C23C16/042 , C23C16/4409 , C23C16/45521 , C23C16/45565 , C23C16/45574 , C23C16/45597 , C23C16/509
Abstract: A plasma processing chamber for depositing a film on an underside surface of a wafer, includes showerhead pedestal. The showerhead pedestal includes a first zone and a second zone. An upper separator fin is disposed over a top surface of the showerhead pedestal and a lower separator fin is disposed under the top surface of the showerhead pedestal and aligned with the upper separator fin. The first zone is configured for depositing a first film to the underside surface of the wafer and the second zone is configured for depositing a second film to the underside surface of the wafer. In another embodiment, a top surface of the showerhead pedestal may be configured to receive a masking plate instead of the upper separator fin. The masking plate is configured with a first area that has openings and a second area that is masked. The first areas is used to provide the process gas to a portion of the underside surface of the wafer for depositing a film.
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公开(公告)号:US20220298632A1
公开(公告)日:2022-09-22
申请号:US17633942
申请日:2020-08-06
Applicant: Lam Research Corporation
Inventor: Fayaz A. Shaikh , Adriana Vintila , Matthew Mudrow , Nick Ray Linebarger, Jr. , Xin Yin , James F. Lee , Brian Joseph Williams
IPC: C23C16/458 , C23C16/44 , C23C16/455 , C23C16/04 , C23C16/509
Abstract: A plasma processing chamber for depositing a film on an underside surface of a wafer, includes showerhead pedestal. The showerhead pedestal includes a first zone and a second zone. An upper separator fin is disposed over a top surface of the showerhead pedestal and a lower separator fin is disposed under the top surface of the showerhead pedestal and aligned with the upper separator fin. The first zone is configured for depositing a first film to the underside surface of the wafer and the second zone is configured for depositing a second film to the underside surface of the wafer. In another embodiment, a top surface of the showerhead pedestal may be configured to receive a masking plate instead of the upper separator fin. The masking plate is configured with a first area that has openings and a second area that is masked. The first areas is used to provide the process gas to a portion of the underside surface of the wafer for depositing a film.
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公开(公告)号:US20250118592A1
公开(公告)日:2025-04-10
申请号:US18730257
申请日:2023-01-18
Applicant: Lam Research Corporation
Inventor: Nick Ray Linebarger, Jr. , Richard M. Blank , Daniel Boatright , Fayaz A. Shaikh , Eric Thomas Dixon , Michael John Janicki , Adriana Vintila , Xin Yin , Conor Charles Arcuri
IPC: H01L21/687 , H01J37/32 , H01L21/68
Abstract: Semiconductor processing tools with wafer back-side processing capabilities are disclosed. Such tools may be configured to only contact wafers being processed through edge contact, as opposed to underside/planar contact. Such tools may also include wafer-centering features that may allow such wafers to be precisely centered with regard to a particular wafer processing station thereof.
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公开(公告)号:US20240167161A1
公开(公告)日:2024-05-23
申请号:US18427348
申请日:2024-01-30
Applicant: Lam Research Corporation
Inventor: Fayaz A. Shaikh , Adriana Vintila , Matthew Mudrow , Nick Ray Linebarger, JR. , Xin Yin , James F. Lee , Brian Joseph Williams
IPC: C23C16/458 , C23C16/04 , C23C16/44 , C23C16/455 , C23C16/509
CPC classification number: C23C16/4585 , C23C16/042 , C23C16/4409 , C23C16/45521 , C23C16/45565 , C23C16/45574 , C23C16/45597 , C23C16/509
Abstract: A plasma processing chamber for depositing a film on an underside surface of a wafer, includes a showerhead pedestal. The showerhead pedestal includes a first zone and a second zone. The first zone is configured for depositing a first film to the underside surface of the wafer and the second zone is configured for depositing a second film to the underside surface of the wafer.
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