公开(公告)号：US20240290780A1

公开(公告)日：2024-08-29

申请号：US18413264

申请日：2024-01-16

Applicant: MEDIATEK INC.

Inventor： Zheng ZENG ,  Chia-Hsin HU ,  Chen-Ting LENG

IPC: H01L27/06 ,  H01L23/528 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/94

CPC classification number: H01L27/0629 ,  H01L23/5286 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/94

Abstract: A semiconductor structure is provided. The semiconductor structure includes a semiconductor substrate, first and second well regions, first and second gate-all-around (GAA) field-effect transistor devices and a first dielectric layer. The first and second well regions are arranged in the semiconductor substrate and separated from each other. Top and bottom surfaces of the first and second well regions are aligned with top and bottom surfaces of the semiconductor substrate. The first and second GAA field-effect transistor devices are formed over the first and second well regions. A first gate structure of the first GAA field-effect transistor device is electrically connected to a power supply terminal. The first epitaxial source/drain features of the first GAA field-effect transistor are electrically connected to the second gate structure of the second GAA field-effect transistor. The second epitaxial source/drain features of the second GAA field-effect transistor are electrically connected to a ground terminal.

公开(公告)号：US20240128262A1

公开(公告)日：2024-04-18

申请号：US18460839

申请日：2023-09-05

Applicant: MEDIATEK INC.

Inventor： Shih-Chuan CHIU ,  Chia-Hsin HU ,  Zheng ZENG

IPC: H01L27/082

CPC classification number: H01L27/082 ,  H01L27/0823

Abstract: Bipolar junction transistor (BJT) structures are provided. First and second well regions are formed over a dielectric layer. A plurality of first and second gate-all-around (GAA) field-effect transistors are formed over a first well region. A plurality of third GAA field-effect transistors are formed over the second well region. Source/drain features of the first and third GAA field-effect transistors and the second well region have a first conductivity type. Source/drain features of the second GAA field-effect transistors and the first well region have a second conductivity type that is different from the first conductivity type. A first PN junction of a first BJT device is formed between the source/drain features of the first GAA field-effect transistors and the first well region, and a second PN junction of the first BJT device is formed between the first well region and the second well region.

公开(公告)号：US20240038755A1

公开(公告)日：2024-02-01

申请号：US18344126

申请日：2023-06-29

Applicant: MEDIATEK INC.

Inventor： Chia-Hsin HU ,  Wei-Chieh TSENG ,  Zheng ZENG

IPC: H01L27/02 ,  H01L29/78 ,  H01L27/092

CPC classification number: H01L27/0207 ,  H01L29/785 ,  H01L27/0924 ,  H01L27/0922 ,  H01L29/66545

Abstract: A semiconductor structure is provided. The semiconductor structure includes a logic cell. The logic cell includes a first transistor and a second transistor. The first transistor includes a first gate structure extending in a first direction and overlapping a first semiconductor fin. The second transistor includes a second gate structure extending in the first direction and overlapping the first semiconductor fin and a second semiconductor fin. The first and second semiconductor fins extend in a second direction that is perpendicular to the first direction. The first and second transistors share a source/drain region, and one end of the first gate structure is formed between the first and second semiconductor fins.

公开(公告)号：US20240014295A1

公开(公告)日：2024-01-11

申请号：US18327287

申请日：2023-06-01

Applicant: MEDIATEK INC.

Inventor： Shih-Chuan CHIU ,  Chia-Hsin HU ,  Zheng ZENG

IPC: H01L29/735 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/735 ,  H01L29/0808 ,  H01L29/1008 ,  H01L29/0821

Abstract: Semiconductor structures of bipolar junction transistor (BJT) are provided. A first active region of a collection region is formed over a first P-type well region. Second and third active regions of a base region are formed over an N-type well region. A fourth active region of an emitter region is formed over a second P-type well region. The first active region includes a plurality of first fins and a plurality of first source/drain features epitaxially grown on the first fins. Each of the second and third active regions includes a plurality of second fins and a plurality of second source/drain features epitaxially grown on the second fins. The fourth active region includes a plurality of third fins and a plurality of third source/drain features epitaxially grown on the third fins. The second and third active regions are disposed on opposite sides of the fourth active region.

公开(公告)号：US20240178221A1

公开(公告)日：2024-05-30

申请号：US18502225

申请日：2023-11-06

Applicant: MEDIATEK INC.

Inventor： Shih-Chuan CHIU ,  Chia-Hsin HU ,  Zheng ZENG

IPC: H01L27/06 ,  H01L29/73 ,  H01L29/78 ,  H01L29/872

CPC classification number: H01L27/0623 ,  H01L27/0629 ,  H01L29/7308 ,  H01L29/7851 ,  H01L29/872

Abstract: Semiconductor structures of Schottky devices are provided. An N-type well region and a P-type well region are formed over a P-type semiconductor substrate. A first active region is formed over the P-type well region, and includes a plurality of first fins. A second active region is formed over the N-type well region, and includes a plurality of second fins. A third active region is formed over the N-type well region, and includes a plurality of third fins. A plurality of electrodes are formed over the third active region. The electrodes, the first source/drain features and the second source/drain features are formed in the same level. An emitter region of a Schottky BJT is formed by the electrodes, a base region of the Schottky BJT is formed by the N-type well region, and a collector region of the Schottky BJT is formed by the P-type semiconductor substrate.