公开(公告)号：US20210036405A1

公开(公告)日：2021-02-04

申请号：US17075561

申请日：2020-10-20

Applicant: MediaTek Inc.

Inventor： Fu-Yi Han ,  Che-Ya Chou ,  Che-Hung Kuo ,  Wen-Chou Wu ,  Nan-Cheng Chen ,  Min-Chen Lin ,  Hsing-Chih Liu

IPC: H01Q1/22 ,  H01L23/66 ,  H01L23/498 ,  H01L23/538

Abstract: One embodiment of the present disclosure provides a semiconductor package including a bottom chip package having a first side and a second side opposing the first side, and a top antenna package mounted on the first side of the bottom chip package. The bottom chip package further includes a semiconductor chip. The semiconductor chip may include a RFIC chip. The top antenna package has at least one radiative antenna element.

公开(公告)号：US11721882B2

公开(公告)日：2023-08-08

申请号：US17075561

申请日：2020-10-20

Applicant: MediaTek Inc.

Inventor： Fu-Yi Han ,  Che-Ya Chou ,  Che-Hung Kuo ,  Wen-Chou Wu ,  Nan-Cheng Chen ,  Min-Chen Lin ,  Hsing-Chih Liu

IPC: H01Q1/22 ,  H01L23/66 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00

CPC classification number: H01Q1/2283 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5384 ,  H01L23/5389 ,  H01L23/66 ,  H01L24/16 ,  H01L24/20 ,  H01L2223/6616 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16141 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/48227 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/1421 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/19042 ,  H01L2924/19106

Abstract: One embodiment of the present disclosure provides a semiconductor package including a bottom chip package having a first side and a second side opposing the first side, and a top antenna package mounted on the first side of the bottom chip package. The bottom chip package further includes a semiconductor chip. The semiconductor chip may include a RFIC chip. The top antenna package has at least one radiative antenna element.

公开(公告)号：US20180358685A1

公开(公告)日：2018-12-13

申请号：US15974700

申请日：2018-05-09

Applicant: MEDIATEK INC.

Inventor： Fu-Yi Han ,  Che-Ya Chou ,  Che-Hung Kuo ,  Wen-Chou Wu ,  Nan-Cheng Chen

IPC: H01Q1/22 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00

CPC classification number: H01L23/66 ,  H01L2223/6616 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321

Abstract: One embodiment of the present disclosure provides a semiconductor package including a bottom chip package having a first side and a second side opposing the first side, and a top antenna package mounted on the first side of the bottom chip package. The bottom chip package further includes a semiconductor chip. The semiconductor chip may include a RFIC chip. The top antenna package has at least one radiative antenna element.

公开(公告)号：US09991780B2

公开(公告)日：2018-06-05

申请号：US14829972

申请日：2015-08-19

Applicant: MediaTek Inc.

Inventor： Jhe-Jia Kuo ,  Fu-Yi Han

IPC: H02M1/12 ,  H02M3/155 ,  H02M3/158

CPC classification number: H02M1/12 ,  H02M3/1584

Abstract: A power management device includes a first power unit, a second power unit, and a control unit. The first power unit receives a first control signal of a first phase to generate a first current of the first phase flowing to an output node. The second power unit receives a second control signal of a second phase to generate a second current of the second phase flowing to the output node. A phase delay is the difference between the first phase and the second phase. The control unit receives a clock signal in a clock frequency to generate the first control signal and the second control signal. The control unit controls the phase delay to cancel a corresponding harmonic of the clock frequency at the output node.