公开(公告)号：US20150192580A1

公开(公告)日：2015-07-09

申请号：US14665050

申请日：2015-03-23

Applicant: MICHAEL C. LEVIN ,  SANGMIN LEE

Inventor： MICHAEL C. LEVIN ,  SANGMIN LEE

IPC: G01N33/564 ,  C07K14/47

CPC classification number: G01N33/564 ,  A61K39/00 ,  C07K14/4713 ,  C07K2319/00 ,  G01N33/6896 ,  G01N2800/2814 ,  G01N2800/2821 ,  G01N2800/2828 ,  G01N2800/2835 ,  G01N2800/285

Abstract: A method of detecting or diagnosing a neurodegenerative disease in a subject by an immunoassay is provided. The immunoassay comprises obtaining a sample from a subject and assaying the sample for the presence of autoantibodies against certain epitopes of heterogeneous nuclear ribonuclear protein A1 (hnRNP A1). The presence of antibodies against a polypeptide or a fragment of polypeptide having the sequence of SEQ ID NO: 1, 4, 5, 6, 7, 8, 9 or 10, an epitope within the M9 shuttling sequence and/or an epitope within the RGG domain of hnRNP A1 indicate a neurodegenerative disease in the subject. Methods of treating neurodegenerative diseases are also provided. In one embodiment, the method of treating a neurodegenerative disease comprises administering, to a subject, a composition comprising hnRNP A1, fragments of the polypeptide and/or a polypeptide comprising epitopes within the M9 and/or RGG domains of hnRNP A1.

Abstract translation: 提供了通过免疫测定法检测或诊断受试者的神经变性疾病的方法。 免疫测定包括从受试者获得样品并测定样品中存在针对异质核核糖核蛋白A1（hnRNP A1）的某些表位的自身抗体。 存在针对多肽或具有SEQ ID NO：1,4,5,6,7,8,9或10的序列的多肽片段的抗体，M9穿梭序列内的表位和/或 hnRNP A1的RGG结构域表示该受试者的神经变性疾病。 还提供了治疗神经退行性疾病的方法。 在一个实施方案中，治疗神经变性疾病的方法包括向受试者施用包含hnRNP A1的组合物，多肽的片段和/或包含hnRNP A1的M9和/或RGG结构域内的表位的多肽。

公开(公告)号：US20160181511A1

公开(公告)日：2016-06-23

申请号：US15057101

申请日：2016-02-29

Applicant: HYUNGJOON KWON ,  SECHUNG OH ,  VLADIMIR URAZAEV ,  KEN TOKASHIKI ,  JONGCHUL PARK ,  Gwang-Hyun BAEK ,  Jaehun SEO ,  SANGMIN LEE

Inventor： HYUNGJOON KWON ,  SECHUNG OH ,  VLADIMIR URAZAEV ,  KEN TOKASHIKI ,  JONGCHUL PARK ,  Gwang-Hyun BAEK ,  Jaehun SEO ,  SANGMIN LEE

IPC: H01L43/02 ,  H01L27/22

CPC classification number: H01L43/08 ,  G11C11/161 ,  H01L27/222 ,  H01L27/228 ,  H01L27/2436 ,  H01L27/2463 ,  H01L43/02 ,  H01L43/10 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148

Abstract: Provided are semiconductor devices and methods of fabricating the same. The semiconductor device may include lower wires, upper wires crossing the lower wires, select elements provided at intersections between the lower and upper wires, and memory elements provided between the select elements and the upper wires. Each of the memory elements may include a lower electrode having a top width greater than a bottom width, and a data storage layer including a plurality of magnetic layers stacked on a top surface of the lower electrode and having a rounded edge.

Abstract translation: 提供半导体器件及其制造方法。 半导体器件可以包括下部布线，穿过下部布线的上部布线，在下部布线和上部布线之间的交叉处提供的选择元件以及设置在选择元件和上部布线之间的存储元件。 每个存储元件可以包括具有大于底部宽度的顶部宽度的下部电极，以及包括堆叠在下部电极的顶表面上并且具有圆形边缘的多个磁性层的数据存储层。

公开(公告)号：US20140124881A1

公开(公告)日：2014-05-08

申请号：US14070471

申请日：2013-11-01

Applicant: HYUNGJOON KWON ,  SECHUNG OH ,  VLADIMIR URAZAEV ,  KEN TOKASHIKI ,  JONGCHUL PARK ,  Gwang-Hyun BAEK ,  Jaehun SEO ,  SANGMIN LEE

Inventor： HYUNGJOON KWON ,  SECHUNG OH ,  VLADIMIR URAZAEV ,  KEN TOKASHIKI ,  JONGCHUL PARK ,  Gwang-Hyun BAEK ,  Jaehun SEO ,  SANGMIN LEE

IPC: H01L43/02

CPC classification number: H01L43/08 ,  G11C11/161 ,  H01L27/222 ,  H01L27/228 ,  H01L27/2436 ,  H01L27/2463 ,  H01L43/02 ,  H01L43/10 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148

Abstract: Provided are semiconductor devices and methods of fabricating the same. The semiconductor device may include lower wires, upper wires crossing the lower wires, select elements provided at intersections between the lower and upper wires, and memory elements provided between the select elements and the upper wires. Each of the memory elements may include a lower electrode having a top width greater than a bottom width, and a data storage layer including a plurality of magnetic layers stacked on a top surface of the lower electrode and having a rounded edge.

Abstract translation: 提供半导体器件及其制造方法。 半导体器件可以包括下部布线，穿过下部布线的上部布线，在下部布线和上部布线之间的交叉处提供的选择元件以及设置在选择元件和上部布线之间的存储元件。 每个存储元件可以包括具有大于底部宽度的顶部宽度的下部电极，以及包括堆叠在下部电极的顶表面上并且具有圆形边缘的多个磁性层的数据存储层。