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公开(公告)号：US10269497B2
公开(公告)日：2019-04-23
申请号：US15611888
申请日：2017-06-02
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yasuo Fujii , Takashi Sawada , Takayuki Kayatani
Abstract: An electronic component includes a laminated body including dielectric layers and internal electrode layers, a first external electrode, a pair of second external electrodes, and a pair of insulating coating portions. The internal electrode layers include first and second internal electrode layers, the second internal electrode layers each include first and second extended electrode portions. A relationship of L1/L2>1.0 is satisfied when a length of a first contact portion with one second external electrode in contact with the first extended electrode portion in the length direction is L1, and a length of a second contact portion with the other second external electrode in contact with the second extended electrode portion in the length direction is L2.
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公开(公告)号：US20190080849A1
公开(公告)日：2019-03-14
申请号：US16190696
申请日：2018-11-14
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yasuo Fujii , Hiromasa Saeki
Abstract: A plurality of first and second capacitor parts and second capacitor parts are formed on opposed main surfaces of a foil shaped conductive substrate to sandwich the conductive substrate. The first and second capacitor parts are respectively coated with insulative protection layers. Terminal electrodes are respectively formed on main surfaces of the protection layers. The terminal electrodes and conductive parts of the first and second capacitor parts are respectively electrically connected via first via conductors and the terminal electrodes and the conductive substrate 1 are electrically connected to second via conductors.
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公开(公告)号：US10217565B2
公开(公告)日：2019-02-26
申请号：US15613491
申请日：2017-06-05
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takashi Sawada , Yasuo Fujii , Takayuki Kayatani
Abstract: An electronic component includes a multilayer body, first to fourth outer electrodes, a pair of first insulating coating portions, and a pair of second insulating coating portions. The pair of first insulating coating portions is in at least one of a state in which inner end portions are in contact with the third outer electrode and a state in which outer end portions are in contact with the first outer electrode and the second outer electrode. The pair of second insulating coating portions is in at least one of a state in which inner end portions are in contact with the fourth outer electrode and a state in which outer end portions are in contact with the first outer electrode and the second outer electrode.
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公开(公告)号：US09502178B2
公开(公告)日：2016-11-22
申请号：US13914957
申请日：2013-06-11
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yasuo Fujii , Yoshinao Nishioka
Abstract: A monolithic capacitor includes a laminated body including stacked dielectric layers and substantially in the shape of a rectangular parallelepiped, and including a first surface being a mounting surface, a second surface opposite to the first surface, opposing third and fourth surfaces orthogonal to the first and second surfaces, and opposing fifth and sixth surfaces orthogonal to the first to fourth surfaces; capacitor electrodes disposed in the laminated body and each including a capacitive portion and a lead portion extending therefrom to at least one surface of the laminated body, the capacitive portions facing each other with dielectric layers interposed therebetween; and first and second outer electrodes disposed on at least one surface of the laminated body and connected to the lead portions. A gap between the first surface and the capacitive portions is greater than a gap between the second surface and the capacitive portions.
Abstract translation: 单片电容器包括层叠体，该层叠体包括堆积的电介质层，并且基本上呈长方体形状，并且包括第一表面，即第一表面，与第一表面相对的第二表面，与第一表面正交的相对的第三和第四表面， 第二表面和与第一至第四表面正交的相对的第五和第六表面; 电容电极设置在所述层叠体中，并且每个电容电极包括电容部分和从其延伸到所述层叠体的至少一个表面的引线部分，所述电容部分彼此面对，其间插入介电层; 以及设置在所述层叠体的至少一个表面上并连接到所述引线部分的第一和第二外部电极。 第一表面和电容部分之间的间隙大于第二表面和电容部分之间的间隙。
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公开(公告)号：US08618422B2
公开(公告)日：2013-12-31
申请号：US13873303
申请日：2013-04-30
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yasuo Fujii , Yoshinao Nishioka
CPC classification number: H05K1/0216 , H05K1/111 , H05K1/16 , H05K3/3442 , H05K2201/2045 , Y02P70/611
Abstract: A mounting structure includes an electronic component mounted on a circuit board. Land electrodes are disposed on a board body and are connected to outer electrodes of the electronic component through solders, respectively. A distance from each of the land electrodes to a top of the corresponding solder is not larger than about 1.27 times a distance from each of the land electrodes to an exposed portion of a capacitor conductor exposed at an end surface of the electronic component, the capacitor conductor being positioned closest to the circuit board.
Abstract translation: 安装结构包括安装在电路板上的电子部件。 接地电极设置在电路板主体上，并分别通过焊料与电子部件的外部电极连接。 从每个焊盘电极到对应焊料的顶部的距离不大于从每个焊盘电极到暴露在电子部件的端面处的电容器导体的暴露部分的距离的大约1.27倍，电容器 导体定位成最靠近电路板。
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Patent Agency Ranking
公开(公告)号：US10535473B2
公开(公告)日：2020-01-14
申请号：US16411370
申请日：2019-05-14
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yasuo Fujii , Naoki Iwaji
Abstract: A capacitor that includes a conductive metal base member having a porous portion in a first main surface, a dielectric layer that entirely covers the first main surface and entirely covers side surfaces disposed along a direction orthogonal to the first main surface, an electrode layer covering the dielectric layer, a second extended electrode covering the electrode layer, a first extended electrode covering a second main surface of the conductive metal base member opposite the first main surface, and an insulation layer that insulates the electrode layer and the conductive metal base member from each other.
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公开(公告)号：US20190267188A1
公开(公告)日：2019-08-29
申请号：US16411370
申请日：2019-05-14
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yasuo Fujii , Naoki Iwaji
Abstract: A capacitor that includes a conductive metal base member having a porous portion in a first main surface, a dielectric layer that entirely covers the first main surface and entirely covers side surfaces disposed along a direction orthogonal to the first main surface, an electrode layer covering the dielectric layer, a second extended electrode covering the electrode layer, a first extended electrode covering a second main surface of the conductive metal base member opposite the first main surface, and an insulation layer that insulates the electrode layer and the conductive metal base member from each other.
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公开(公告)号：US10395836B2
公开(公告)日：2019-08-27
申请号：US15611884
申请日：2017-06-02
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takashi Sawada , Yasuo Fujii , Takayuki Kayatani
IPC: H01G4/30 , H01G4/005 , H01G4/12 , H01G4/248 , H01K1/18 , H05K1/18 , H01G4/012 , H01G4/224 , H01G4/232
Abstract: A multilayer ceramic electronic component includes a laminated body, a first external electrode, a pair of second external electrodes, and a pair of insulating coating portions. The pair of insulating coating portions extends in a laminating direction between each of the pair of second external electrodes and the first external electrode on a second principal surface, from the second principal surface to respective portions of a first side surface and a second side surface. As viewed from at least one direction in the laminating direction, an end of the pair of insulating coating portions, which is located closest to a first principal surface, is located closer to the first principal surface than an end of the first external electrode and pair of second external electrodes, which is located closest to the first principal surface.
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公开(公告)号：US10299369B2
公开(公告)日：2019-05-21
申请号：US15586312
申请日：2017-05-04
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yasuo Fujii , Hiroaki Hori
IPC: H05K1/00 , H05K1/02 , H01G4/012 , H01G4/248 , H01G4/30 , H03H7/38 , H05K1/11 , H05K1/18 , H05K3/30 , H01G4/35 , H01G4/40 , H01G2/06 , H01G4/232
Abstract: A wiring board is provided with power supply patterns for each type of power supply of an IC. An IC has a plurality of power supply terminals for each type of power supply. For each type of power supply, two or more laminated capacitors are provided in parallel between the power supply of IC and a ground. Two or more laminated capacitors provided for each type of power supply include a laminated capacitor having a Q factor of less than about 0.5. For each type of power supply, in order to satisfy a target impedance, two or more laminated capacitors are arranged and distributed such that at least half of the plurality of power supply terminals are included in a region obtained by combining cover areas.
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公开(公告)号：US10283269B2
公开(公告)日：2019-05-07
申请号：US15785694
申请日：2017-10-17
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yasuo Fujii , Yohei Mukobata , Kotaro Kishi
Abstract: A multilayer ceramic capacitor satisfies L≤about 1.4 mm, about 1.1≤L/W≤about 1.6, e≥about 0.10 mm, i/L>about 0.40 and i/g>about 2. L and W are maximum outer dimensions in length and width directions, e is a length direction distance along which a first or second end surface outer electrode located on a first side surface extends or along which the first or second end surface outer electrode located on a second side surface extends, g is a smallest distance among length direction distances between the first end surface outer electrode and a first or second side surface outer electrode and between the second end surface outer electrode and the first or second side surface outer electrode, and i is a distance on the side where g is among distances in the length direction along which the first and second side surface outer electrodes extend.
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