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公开(公告)号：US10937782B2
公开(公告)日：2021-03-02
申请号：US15705017
申请日：2017-09-14
Applicant: NXP B.V.
Abstract: An electrostatic discharge, ESD, protection structure (200) formed within a semiconductor substrate of an integrated circuit device (600). The integrated circuit device (600) comprising: a radio frequency domain (632); a digital domain (610). The ESD protection structure (200) further includes an intermediate domain located between the radio frequency domain (632) and the digital domain (610) that comprises at least one radio frequency, RF, passive or active device that exhibits an impedance characteristic that increases as a frequency of operation increases.
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公开(公告)号：US20150311194A1
公开(公告)日：2015-10-29
申请号：US14692988
申请日：2015-04-22
Applicant: NXP B.V.
Inventor： Dolphin Abessolo Bidzo , Bart van Velzen
IPC: H01L27/02 , H01L21/285 , H01L29/66 , H01L21/027 , H01L29/45 , H01L29/78
CPC classification number: H01L27/0266 , H01L21/027 , H01L21/28518 , H01L27/0248 , H01L27/0259 , H01L29/41725 , H01L29/45 , H01L29/665 , H01L29/78
Abstract: An electrostatic discharge (ESD) protection device on a semiconductor substrate and a method for making the same. The device has an active region. The active region includes a gate. The active region also includes a source including a silicide portion having a source contact. The active region further includes a drain including a silicide portion having a drain contact. The source and drain each extend away from the gate along a device axis. The drain contact is laterally offset with respect to the source contact along a direction orthogonal to the device axis whereby current flow between the source contact and the drain contact has a lateral component. The device further comprises a non-silicide region located laterally between the drain contact and the source contact.
Abstract translation: 半导体衬底上的静电放电（ESD）保护器件及其制造方法。 该设备具有活动区域。 有源区包括一个门。 有源区还包括源，该源包括具有源极接触的硅化物部分。 有源区还包括漏极，其包括具有漏极接触的硅化物部分。 源极和漏极各自沿着器件轴线远离栅极延伸。 漏极接触件沿着与器件轴线正交的方向相对于源极接触侧向偏移，从而源极接触件和漏极接触件之间的电流流动具有侧向部件。 该器件还包括位于漏极接触件和源极接触件之间的非硅化物区域。
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公开(公告)号：US11101264B2
公开(公告)日：2021-08-24
申请号：US16540303
申请日：2019-08-14
Applicant: NXP B.V.
Inventor： Dolphin Abessolo Bidzo
Abstract: An electrostatic-discharge (ESD) protection circuit is provided. The circuit includes an I/O terminal coupled for receiving a signal having a negative voltage relative to a voltage supply terminal. An ESD transistor is formed in an isolated well. The transistor includes a control electrode and a first current electrode coupled to the I/O terminal. The isolated well is configured as a body electrode of the transistor. An ESD diode includes an anode electrode coupled to the voltage supply terminal and a cathode electrode coupled to a second current electrode of the transistor.
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公开(公告)号：US20210203154A1
公开(公告)日：2021-07-01
申请号：US16731785
申请日：2019-12-31
Applicant: NXP B.V.
Inventor： Siamak Delshadpour , Dolphin Abessolo Bidzo
Abstract: An integrated circuit (IC) is disclosed. The IC includes a pin to electrically connect the IC to an external circuit and a transistor that includes a base, a collector and an emitter. The pin is coupled to an internal circuit that is configured to operate in a preselected operating frequency range. The base is coupled to the pin and a resistor is coupled between the base and the pin. The IC further includes an electrostatic discharge (ESD) rail coupled to the pin through a first ESD diode. A second ESD diode is coupled between the floating ESD rail and a power supply to provide a second ESD current sink path.
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公开(公告)号：US20200075585A1
公开(公告)日：2020-03-05
申请号：US16120098
申请日：2018-08-31
Applicant: NXP B.V.
Inventor： Petrus Hubertus Cornelis Magnee , Pieter Simon van Dijk , Johannes Josephus Theodorus Marinus Donkers , Dolphin Abessolo Bidzo
IPC: H01L27/082 , H01L21/8222 , H01L21/8249 , H01L21/02 , H01L21/306 , H01L21/266 , H01L21/225 , H01L21/324 , H01L27/02 , H01L27/06 , H01L29/04 , H01L29/165 , H01L29/66 , H01L29/732 , H01L29/737
Abstract: This specification discloses methods for integrating a SiGe-based HBT (heterojunction bipolar transistor) and a Si-based BJT (bipolar junction transistor) together in a single manufacturing process that does not add a lot of process complexity, and an integrated circuit that can be fabricated utilizing such a streamlined manufacturing process. In some embodiments, such an integrated circuit can enjoy both the benefits of a higher RF (radio frequency) performance for the SiGe HBT and a lower leakage current for the Si-based BJT. In some embodiments, such an integrated circuit can be applied to an ESD (electrostatic discharge) clamp circuit, in order to achieve a lower, or no, yield-loss.
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Patent Agency Ranking
公开(公告)号：US11038346B1
公开(公告)日：2021-06-15
申请号：US16731785
申请日：2019-12-31
Applicant: NXP B.V.
Inventor： Siamak Delshadpour , Dolphin Abessolo Bidzo
Abstract: An integrated circuit (IC) is disclosed. The IC includes a pin to electrically connect the IC to an external circuit and a transistor that includes a base, a collector and an emitter. The pin is coupled to an internal circuit that is configured to operate in a preselected operating frequency range. The base is coupled to the pin and a resistor is coupled between the base and the pin. The IC further includes an electrostatic discharge (ESD) rail coupled to the pin through a first ESD diode. A second ESD diode is coupled between the floating ESD rail and a power supply to provide a second ESD current sink path.
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公开(公告)号：US20210050340A1
公开(公告)日：2021-02-18
申请号：US16540303
申请日：2019-08-14
Applicant: NXP B.V.
Inventor： Dolphin Abessolo Bidzo
Abstract: An electrostatic-discharge (ESD) protection circuit is provided. The circuit includes an I/O terminal coupled for receiving a signal having a negative voltage relative to a voltage supply terminal. An ESD transistor is formed in an isolated well. The transistor includes a control electrode and a first current electrode coupled to the I/O terminal. The isolated well is configured as a body electrode of the transistor. An ESD diode includes an anode electrode coupled to the voltage supply terminal and a cathode electrode coupled to a second current electrode of the transistor.
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公开(公告)号：US09385116B2
公开(公告)日：2016-07-05
申请号：US14692988
申请日：2015-04-22
Applicant: NXP B.V.
Inventor： Dolphin Abessolo Bidzo , Bart van Velzen
IPC: H01L29/00 , H01L27/02 , H01L29/417 , H01L21/027 , H01L21/285 , H01L29/45 , H01L29/66 , H01L29/78
CPC classification number: H01L27/0266 , H01L21/027 , H01L21/28518 , H01L27/0248 , H01L27/0259 , H01L29/41725 , H01L29/45 , H01L29/665 , H01L29/78
Abstract: An electrostatic discharge (ESD) protection device on a semiconductor substrate and a method for making the same. The device has an active region. The active region includes a gate. The active region also includes a source including a silicide portion having a source contact. The active region further includes a drain including a silicide portion having a drain contact. The source and drain each extend away from the gate along a device axis. The drain contact is laterally offset with respect to the source contact along a direction orthogonal to the device axis whereby current flow between the source contact and the drain contact has a lateral component. The device further comprises a non-silicide region located laterally between the drain contact and the source contact.
Abstract translation: 半导体衬底上的静电放电（ESD）保护器件及其制造方法。 该设备具有活动区域。 有源区包括一个门。 有源区还包括源，该源包括具有源极接触的硅化物部分。 有源区还包括漏极，其包括具有漏极接触的硅化物部分。 源极和漏极各自沿着器件轴线远离栅极延伸。 漏极接触件沿着与器件轴线正交的方向相对于源极接触侧向偏移，从而源极接触件和漏极接触件之间的电流流动具有侧向部件。 该器件还包括位于漏极接触件和源极接触件之间的非硅化物区域。
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公开(公告)号：US20230361110A1
公开(公告)日：2023-11-09
申请号：US17739568
申请日：2022-05-09
Applicant: NXP B.V.
CPC classification number: H01L27/0288 , H01L27/0255 , H02H9/046 , H03F1/523 , H03F2200/294
Abstract: An electro-static discharge (ESD) protection system for a wireless transceiver comprises a switch circuit at a first terminal and a second terminal of a low noise amplifier; a primary ESD protection circuit between an input terminal and a low voltage supply terminal of the wireless transceiver for shunting a first source of current of an ESD event; a clamp element between a high voltage supply terminal and the low voltage supply terminal having a clamping voltage that is less than a breakdown voltage of the LNA for preventing a second source of current of the ESD event from receipt by the LNA; and a power supply ESD clamp element between the high voltage supply terminal and the low voltage supply terminal for shunting a third source of current of the ESD event at the high voltage supply terminal.
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公开(公告)号：US20190081037A1
公开(公告)日：2019-03-14
申请号：US15705017
申请日：2017-09-14
Applicant: NXP B.V.
Abstract: An electrostatic discharge, ESD, protection structure (200) formed within a semiconductor substrate of an integrated circuit device (600). The integrated circuit device (600) comprising: a radio frequency domain (632); a digital domain (610). The ESD protection structure (200) further includes an intermediate domain located between the radio frequency domain (632) and the digital domain (610) that comprises at least one radio frequency, RF, passive or active device that exhibits an impedance characteristic that increases as a frequency of operation increases.
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