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公开(公告)号：US20240388259A1
公开(公告)日：2024-11-21
申请号：US18638786
申请日：2024-04-18
Applicant: NXP B.V.
Inventor： Xin Yang , Stephane David , Mark Pieter van der Heijden , Dominicus MARTINUS WILHELMUS Leenaerts
Abstract: A bias circuit for a RF amplifier is described. The bias circuit includes a first transistor and a second transistor configured as a first current mirror. A first current source is arranged between a supply node and the first transistor first terminal. An output of the bias circuit is coupled to the second transistor second terminal. A second current mirror coupled to the first current mirror and the bias circuit output. The bias circuit includes a first resistor coupled between a first transistor control terminal and a second transistor control terminal and a variable capacitor coupled between the second transistor control terminal and a ground.
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2.发明公开公开(公告)号：US20240106101A1
公开(公告)日：2024-03-28
申请号：US18459815
申请日：2023-09-01
Applicant: NXP B.V.
Inventor： Xin Yang , Mustafa Acar , Zhe Chen , Dominicus MARTINUS WILHELMUS Leenaerts
IPC: H01P5/12
CPC classification number: H01P5/12
Abstract: A circuit comprising: a common terminal, first terminal and second terminal, wherein the common terminal is coupled to a first and second circuit branch at a branch node; wherein the first/second circuit branches include a respective first/second quarter wavelength transmission line having a first end coupled to the branch node and a second end respectively coupled to the first/second terminal; wherein the first and second terminals are coupled together via a branch-interconnection arrangement; wherein the circuit comprises: a first switched arrangement comprising a first switch having a first and second switch-terminal, wherein the first switch-terminal is coupled to the common terminal, and wherein a first resistor and a first capacitor are arranged in parallel and coupled between the second switch-terminal and a reference terminal; and a second switched arrangement coupled to the first terminal, wherein the first quarter wavelength transmission line is coupled between the first and second switched arrangements.
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公开(公告)号：US11502682B2
公开(公告)日：2022-11-15
申请号：US17350300
申请日：2021-06-17
Applicant: NXP B.V.
Abstract: A radio frequency, RF, switch circuit (201, 301, 401, 501, 601, 701, 751, 801) includes at least one first PiN diode device (252, 352, 452, 552, 652, 752, 852, 945) configured to sink or source a first alternating current; and an impedance inversion circuit (222, 322, 422, 522, 622, 722, 822, 922), connected to the at least one first PiN diode device and arranged to provide a transformed impedance between a first side of the impedance inversion circuit and a second side of the impedance inversion circuit. The RF switch further includes a second diode-based device (254, 354, 454, 554, 654, 754, 854, 945) configured to source or sink a second alternating current; and a bias circuit (330, 430, 530, 630, 830, 930) connected to at least one of the at least one first PiN diode device and the second diode-based device, wherein the at least one first PiN diode device cooperates with the second diode-based device as a push-pull current circuit.
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公开(公告)号：US20220014186A1
公开(公告)日：2022-01-13
申请号：US17350300
申请日：2021-06-17
Applicant: NXP B.V.
Abstract: A radio frequency, RF, switch circuit (201, 301, 401, 501, 601, 701, 751, 801) includes at least one first PiN diode device (252, 352, 452, 552, 652, 752, 852, 945) configured to sink or source a first alternating current; and an impedance inversion circuit (222, 322, 422, 522, 622, 722, 822, 922), connected to the at least one first PiN diode device and arranged to provide a transformed impedance between a first side of the impedance inversion circuit and a second side of the impedance inversion circuit. The RF switch further includes a second diode-based device (254, 354, 454, 554, 654, 754, 854, 945) configured to source or sink a second alternating current; and a bias circuit (330, 430, 530, 630, 830, 930) connected to at least one of the at least one first PiN diode device and the second diode-based device, wherein the at least one first PiN diode device cooperates with the second diode-based device as a push-pull current circuit.
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公开(公告)号：US20220006171A1
公开(公告)日：2022-01-06
申请号：US17358072
申请日：2021-06-25
Applicant: NXP B.V.
Inventor： Xin Yang , Mark Pieter van der Heijden
Abstract: A Wilkinson power combiner (202) is described that includes: at least one input port (210) coupled to at least one output port (212, 214, 216, 218) by at least two power combining stages. A first power combining stage (204) of the at least two power combining stages is configured as a single-stage first frequency pass circuit and a second power combining stage (206) of the at least two stages is configured as a single-stage second frequency pass circuit, and wherein the first frequency is different to the second frequency.
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Patent Agency Ranking
公开(公告)号：US20200274575A1
公开(公告)日：2020-08-27
申请号：US16794846
申请日：2020-02-19
Applicant: NXP B.V.
Inventor： Xin Yang , Mark Pieter van der Heijden , Gerben Willem de Jong
IPC: H04B1/44 , H03H11/28 , H03K17/567 , H04L5/16
Abstract: A switch arrangement comprising: a transceiver node coupled to a first and second circuit branch, the first circuit branch including a transmit node, the second circuit branch including a receive node; wherein the first circuit branch comprises an inductor coupled in series and a first semiconductor switch, in parallel, configured to provide a switched coupling to a reference voltage; and wherein the second circuit branch comprises one of: i) a second and third semiconductor switch; and ii) a second semiconductor switch and a third semiconductor switch configured to control the application of a supply voltage to an amplifier; and iii) a further semiconductor switch configured to control the application of a bias current to an amplifier; wherein in the first switch mode, impedance matching between the transceiver node and transmit node is provided; in the second switch mode, impedance matching between the transceiver node and receive node is provided,
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公开(公告)号：US11695193B2
公开(公告)日：2023-07-04
申请号：US17358080
申请日：2021-06-25
Applicant: NXP B.V.
Inventor： Xin Yang , Mark Pieter van der Heijden
Abstract: A Wilkinson power combiner (202) is described that includes a high-pass, HP, frequency circuit (500, 550), wherein the HP frequency circuit (500, 550) comprises at least one of: (i) one input port (510) coupled to at least two output ports (512, 514) via at least two paths; and an input shunt inductor (520) coupling the input port (510) to ground; wherein the one input port (510) is coupled to the at least two output ports (512, 514) via respective series capacitances (230, 238) on the at least two paths, which in cooperation with the input shunt inductor (520) forms a first HP frequency circuit; and (ii) at least one resistor (554, 528)-inductor (552, 524), R-L isolation circuit (500, 550) configured to couple the at least two output ports (512, 514) that forms a second HP frequency circuit.
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公开(公告)号：US20220285081A1
公开(公告)日：2022-09-08
申请号：US17651868
申请日：2022-02-21
Applicant: NXP B.V.
Inventor： Xin Yang , Mark Pieter van der Heijden
Abstract: A radio frequency, RF, auto-transformer circuit (300, 700, 901) and method (1000) of constructing a RF auto-transformer are described. The RF, auto-transformer circuit (300, 700, 901) includes: an inner coil formed (1102) with a first metal layer (MT1) to create a first shunt inductor (302), wherein at least a portion of the inner coil is overlayed (1106) with a second metal layer (MT2) that creates a first series inductor (303) that exhibits inductive coupling to the first shunt inductor (302). An outer coil is formed (1104) with the first metal layer (MT1) that creates a second series inductor (304), where the outer coil is located adjacent the inner coil and provides inductive coupling between the second series inductor (304) and each of the first shunt inductor (302) and first series inductor (303). At least a portion of the outer coil is overlayed (1008) with the second metal layer (MT2) that creates a second shunt inductor (301) that exhibits inductive coupling between the second shunt inductor (301) and each of the first shunt inductor (302) and first series inductor (303) and second series inductor (304). The outer coil is connected (1112) to the inner coil using vias and the respective first metal layer (MT1) is connected to the second layer (MT2) using vias.
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公开(公告)号：US10985795B2
公开(公告)日：2021-04-20
申请号：US16794846
申请日：2020-02-19
Applicant: NXP B.V.
Inventor： Xin Yang , Mark Pieter van der Heijden , Gerben Willem de Jong
IPC: H04B1/44 , H03H11/28 , H03K17/567 , H04L5/16
Abstract: A switch arrangement comprising: a transceiver node coupled to a first and second circuit branch, the first circuit branch including a transmit node, the second circuit branch including a receive node; wherein the first circuit branch comprises an inductor coupled in series and a first semiconductor switch, in parallel, configured to provide a switched coupling to a reference voltage; and wherein the second circuit branch comprises one of: i) a second and third semiconductor switch; and ii) a second semiconductor switch and a third semiconductor switch configured to control the application of a supply voltage to an amplifier; and iii) a further semiconductor switch configured to control the application of a bias current to an amplifier; wherein in the first switch mode, impedance matching between the transceiver node and transmit node is provided; in the second switch mode, impedance matching between the transceiver node and receive node is provided.
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公开(公告)号：US12211840B2
公开(公告)日：2025-01-28
申请号：US17644138
申请日：2021-12-14
Applicant: NXP B.V.
Inventor： Jozef Reinerus Maria Bergervoet , Xin Yang , Mark Pieter van der Heijden , Lukas Frederik Tiemeijer , Alessandro Baiano
IPC: H01L27/08 , H01L21/8234 , H01L23/528 , H01L27/088 , H01L23/532
Abstract: A metal oxide semiconductor, MOS, device (405) is described that includes a gate terminal, at least one source terminal and at least one drain terminal, wherein at least one source terminal and at least one drain terminal are formed of metal and are connected to a number of respective contact vias. A plurality of local interconnect layers, LIL, (470) are connected respectively to the least one source terminal and at least one drain terminal through the number of respective contact vias, wherein the at least one source terminal and the at least one drain terminal respectively connected to the plurality of LIL (470) are configured such that: the at least one source terminal and the at least one drain terminal do not overlap in a first direction (602) and a second direction (604) that is orthogonal to the first direction (602); and the at least one source terminal and the at least one drain terminal do not overlap or only a proportion of the at least one source terminal and the at least one drain terminal overlap in a third direction (606), where the third direction (606) is orthogonal to both the first direction (602) and the second direction (604).
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