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公开(公告)号：US20160043860A1
公开(公告)日：2016-02-11
申请号：US14644216
申请日：2015-03-11
Applicant: Novatek Microelectronics Corp.
Inventor： Chao-Kai Tu , Rong-Sing Chu
CPC classification number: H03L7/0807 , H03L7/0816 , H03L7/087 , H04L7/0037 , H04L7/0337
Abstract: A clock and data recovery apparatus which includes a voltage controlled delay line (VCDL), a phase detector (PD) and a control voltage generating circuit is provided. The VCDL generates a plurality of clock signals with different phases according to a reference clock signal and a control voltage. The PD detects the phase relationship between a first input signal and a second input signal, and produces a detection result. A data signal or one of the clock signals is used as the first input signal, and one or more of the clock signals is/are used as the second input signal. The control voltage generating circuit generates the control voltage to the VCDL according to the detection result of the PD.
Abstract translation: 提供了包括电压控制延迟线（VCDL），相位检测器（PD）和控制电压产生电路的时钟和数据恢复装置。 VCDL根据参考时钟信号和控制电压产生具有不同相位的多个时钟信号。 PD检测第一输入信号和第二输入信号之间的相位关系，并产生检测结果。 使用数据信号或时钟信号之一作为第一输入信号，并且使用一个或多个时钟信号作为第二输入信号。 控制电压产生电路根据PD的检测结果生成对VCDL的控制电压。
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公开(公告)号：US09780794B2
公开(公告)日：2017-10-03
申请号：US14644216
申请日：2015-03-11
Applicant: Novatek Microelectronics Corp.
Inventor： Chao-Kai Tu , Rong-Sing Chu
CPC classification number: H03L7/0807 , H03L7/0816 , H03L7/087 , H04L7/0037 , H04L7/0337
Abstract: A clock and data recovery apparatus which includes a voltage controlled delay line (VCDL), a phase detector (PD) and a control voltage generating circuit is provided. The VCDL generates a plurality of clock signals with different phases according to a reference clock signal and a control voltage. The PD detects the phase relationship between a first input signal and a second input signal, and produces a detection result. A data signal or one of the clock signals is used as the first input signal, and one or more of the clock signals is/are used as the second input signal. The control voltage generating circuit generates the control voltage to the VCDL according to the detection result of the PD.
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