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公开(公告)号:US12200383B2
公开(公告)日:2025-01-14
申请号:US18098451
申请日:2023-01-18
Inventor: Masaki Tamaru , Shigetaka Kasuga , Shinzo Koyama
IPC: H04N25/771 , H04N25/50 , H04N25/78
Abstract: A solid-state imaging apparatus includes a plurality of pixel circuits arranged in a matrix. Each pixel circuit includes: a photodiode; a first charge storage that stores a charge; a floating diffusion region that stores a charge; a second charge storage that stores a charge; a first transfer transistor that transfers a charge from the photodiode to the first charge storage; a second transfer transistor that transfers a charge from the first charge storage to the floating diffusion region; a first reset transistor that resets the floating diffusion region; and an accumulating transistor for accumulating a charge of the floating diffusion region in the second charge storage. The capacitance of the first charge storage is greater than the capacitance of the floating diffusion region, and the capacitance of the second charge storage is greater than the capacitance of the floating diffusion region.
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公开(公告)号:US12007478B2
公开(公告)日:2024-06-11
申请号:US16982405
申请日:2019-03-14
Inventor: Hiroshi Koshida , Shinzo Koyama , Motonori Ishii , Shigetaka Kasuga
IPC: G01C3/08 , G01S7/481 , G01S7/4865 , G01S17/10 , G01S17/89
CPC classification number: G01S17/10 , G01S7/4816 , G01S7/4865 , G01S17/89
Abstract: A distance measuring device is to be connected to a wave transmission module to transmit a measuring wave and a wave reception module including a first wave receiver and a second wave receiver, both of which receive the measuring wave reflected from a target. In this distance measuring device, a first wave reception period in which the first wave receiver receives the measuring wave and a second wave reception period in which the second wave receiver receives the measuring wave overlap with each other on a time axis. In addition, in this distance measuring device, a time lag is provided between respective beginning times of the first and second wave reception periods. The time lag is shorter than either the first wave reception period or the second wave reception period.
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公开(公告)号:US10469774B2
公开(公告)日:2019-11-05
申请号:US16121972
申请日:2018-09-05
Inventor: Shigetaka Kasuga , Tsuyoshi Tanaka
IPC: H04N5/355 , H04N5/235 , H04N5/243 , H01L27/146 , H01L31/107 , H04N5/341 , H04N5/353 , H04N5/378 , H04N5/3745 , G01J1/44
Abstract: An imaging apparatus changes a multiplication factor of an avalanche photodiode (APD) at one of (i) a first timing subsequent to an exposure period of a first frame in a first vertical scanning period and a readout period of the first frame in a second vertical scanning period, and previous to an exposure period of a second frame in a third vertical scanning period, and (ii) a second timing subsequent to an exposure period of the first frame in the first vertical scanning period, and previous to a readout period of the first frame and an exposure period of the second frame which are provided in parallel in the second vertical scanning period.
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公开(公告)号:US12120448B2
公开(公告)日:2024-10-15
申请号:US17683465
申请日:2022-03-01
Inventor: Shota Yamada , Motonori Ishii , Shigetaka Kasuga , Masato Takemoto , Yutaka Hirose
IPC: H04N25/778 , H04N25/60 , H04N25/772
CPC classification number: H04N25/778 , H04N25/60 , H04N25/772
Abstract: An imaging device includes: a solid-state imaging element having a plurality of pixel cells arranged in a matrix; and a signal processing part configured to process a detection signal outputted from each of the pixel cells. The pixel cells each include an avalanche photodiode and output a voltage corresponding to a count number of photons received by the avalanche photodiode as the detection signal. The signal processing part includes a variation calculation part configured to calculate a variation between the pixel cells in the detection signal outputted from each of the pixel cells, and a correction calculation part configured to correct the detection signal outputted from each of the pixel cells, on the basis of the variation calculated by the variation calculation part.
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公开(公告)号:US09319609B2
公开(公告)日:2016-04-19
申请号:US14578560
申请日:2014-12-22
Inventor: Shigetaka Kasuga , Motonori Ishii
IPC: H04N5/335 , H04N5/3745 , H04N5/363 , H04N5/378 , H01L27/146
CPC classification number: H04N5/3745 , H01L27/14643 , H04N5/363 , H04N5/378
Abstract: A pixel unit included in a sensor chip includes: a first pixel connected to a first feedback amplifier which is connected to a first column signal line as an input line and a first reset drain line as an output line; and a second pixel connected to a second feedback amplifier which is connected to a second column signal line as an input line and a second reset drain line as an output line. A drain of a reset transistor of the first pixel is connected to the first reset drain line, a drain of a reset transistor of the second pixel is connected to the second reset drain line, a source of an amplifying transistor of the first pixel is connected to the first column signal line, and a source of an amplifying transistor of the second pixel is connected to the second column signal line.
Abstract translation: 包括在传感器芯片中的像素单元包括:连接到第一反馈放大器的第一像素,其连接到作为输入线的第一列信号线和作为输出线的第一复位漏极线; 以及连接到第二反馈放大器的第二像素,其连接到作为输入线的第二列信号线和作为输出线的第二复位漏极线。 第一像素的复位晶体管的漏极连接到第一复位漏极线,第二像素的复位晶体管的漏极连接到第二复位漏极线,第一像素的放大晶体管的源极连接 到第一列信号线,并且第二像素的放大晶体管的源极连接到第二列信号线。
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公开(公告)号:US10812729B2
公开(公告)日:2020-10-20
申请号:US15461159
申请日:2017-03-16
Inventor: Shigetaka Kasuga , Seiji Yamahira , Yoshihisa Kato
IPC: H04N5/235 , H04N5/374 , H04N5/3745 , H04N5/378 , G01J1/44 , H01L31/107
Abstract: A solid-state imaging device includes a detector, a count value storage, and a reader. The detector includes an avalanche amplification type light receiving element that detects a photon, and a resetter that resets an output potential of the light receiving element, and outputs a digital signal that indicates the presence or absence of incidence of a photon on the light receiving element. The count value storage performs counting by converting the digital signal output from the detector to an analog voltage, and stores the result of counting as a count value. The reader outputs an analog signal indicating the count value.
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公开(公告)号:US12088946B2
公开(公告)日:2024-09-10
申请号:US17679942
申请日:2022-02-24
Inventor: Shota Yamada , Shigetaka Kasuga , Motonori Ishii , Akito Inoue , Yutaka Hirose
IPC: H04N25/778 , G01S7/481 , G01S7/4865 , G01S17/894 , H04N25/771
CPC classification number: H04N25/778 , G01S7/4816 , G01S7/4865 , G01S17/894 , H04N25/771
Abstract: An imaging device includes: a solid-state imaging element having a plurality of pixel cells arranged in a matrix; and a control part configured to control the solid-state imaging element. The pixel cells each include an avalanche photodiode, a floating diffusion part configured to accumulate electric charges, a transfer transistor connecting a cathode of the avalanche photodiode and the floating diffusion part, and a reset transistor for resetting electric charges accumulated in the floating diffusion part. The control part controls the reset transistor to discharge electric charges exceeding a predetermined electric charge amount, of electric charges accumulated in the floating diffusion part from the cathode of the avalanche photodiode via the transfer transistor.
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公开(公告)号:US11965987B2
公开(公告)日:2024-04-23
申请号:US17486753
申请日:2021-09-27
Inventor: Motonori Ishii , Shigetaka Kasuga
IPC: G01S7/4861 , G01S17/10 , H04N23/56 , H04N25/75
CPC classification number: G01S7/4861 , G01S17/10 , H04N23/56 , H04N25/75
Abstract: A driver circuit includes: a first node connected to a first signal line; a first switch transistor provided between a first power supply and a first capacitor; a second switch transistor provided between a second power supply and a second capacitor; a third switch transistor provided between the first capacitor and the first node; and a fourth switch transistor provided between the second capacitor and the first node.
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公开(公告)号:US11153521B2
公开(公告)日:2021-10-19
申请号:US16688796
申请日:2019-11-19
Inventor: Shigetaka Kasuga , Manabu Usuda , Kentaro Nakanishi
IPC: H04N5/3745 , H01L27/146 , H01L31/107
Abstract: A solid-state image sensor includes a pixel array including pixel cells arranged in a matrix. Each of the pixel cells includes an avalanche photodiode, a floating diffusion which accumulates charges, a transfer transistor which connects a cathode of the avalanche photodiode to the floating diffusion, a first reset transistor for resetting charges collected in the cathode of the avalanche photodiode, a second reset transistor for resetting charges accumulated in the floating diffusion, an amplification transistor for converting a charge amount of charges accumulated in the floating diffusion into a voltage, a memory which accumulates charges, and a count transistor which connects the floating diffusion to the memory.
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