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公开(公告)号:US10999938B1
公开(公告)日:2021-05-04
申请号:US16861326
申请日:2020-04-29
Applicant: Raytheon Company
Inventor: Mikhail Pevzner , Donald G. Hersey , Gregory G. Beninati , Thomas J. Tellinghuisen , James E. Benedict
Abstract: Methods and apparatus for an assembly having first and second circuit cards mated together with a ball stack on the first circuit card extending into a through hole in the second circuit card. A wirebond connects the first ball stack to a bond pad on the first surface of the second circuit card forming a low profile connector-less interconnect. The ball stack comprises at least two balls stacked on top of each other and bonded to each other, wherein the balls are generated from wire.
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2.
公开(公告)号:US11122692B1
公开(公告)日:2021-09-14
申请号:US16898930
申请日:2020-06-11
Applicant: RAYTHEON COMPANY
Inventor: James E. Benedict , Gregory G. Beninati , Mikhail Pevzner , Thomas V. Sikina , Andrew R. Southworth
Abstract: A process of fabricating a circuit includes providing a first sheet of dielectric material including a first top surface having at least one first conductive trace and a second sheet of dielectric material including a second top surface having at least one second conductive trace, depositing a first solder bump on the at least one first conductive trace, applying the second sheet of dielectric material to the first sheet of dielectric material with bonding film sandwiched in between, bonding the first and second sheets of dielectric material to one another, and providing a conductive material to connect the first solder bump on the at least one first conductive trace to the at least one second conductive trace.
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公开(公告)号:US10026674B2
公开(公告)日:2018-07-17
申请号:US14978358
申请日:2015-12-22
Applicant: Raytheon Company
Inventor: Joseph M. Wahl , Travis L. Mayberry , Gregory G. Beninati
IPC: H01L23/373 , H01L21/48 , H01L23/367 , H01L23/467 , H01L23/473
Abstract: A method for forming a cooling structure having a plurality of cooling members. The method includes: providing a template having a plurality of features, such members projecting outward from a base of a template or holes passing into the template, the features being arranged in a predetermined pattern, such pattern being selected in accordance with the predetermined pattern of cooling members; and forming a conformal coating of diamond over the features.
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公开(公告)号:US11926006B2
公开(公告)日:2024-03-12
申请号:US17204556
申请日:2021-03-17
Applicant: Raytheon Company
Inventor: Travis Mayberry , Gregory G. Beninati , Matthew Kelly , Michael Arthur
Abstract: A method of manufacture is provided that includes providing a preform component. The preform component includes a blind aperture in an exterior of the preform component. The exterior of the preform component is machined to provide a machined component. An exterior of the machined component is inspected to determine a characteristic of the machined component, which characteristic of the machined component is associated with the blind aperture. Whether a feature of the machined component satisfies a standard is determined based on the characteristic of the machined component.
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公开(公告)号:US20220297248A1
公开(公告)日:2022-09-22
申请号:US17204556
申请日:2021-03-17
Applicant: Raytheon Company
Inventor: Travis Mayberry , Gregory G. Beninati , Matthew Kelly , Michael Arthur
Abstract: A method of manufacture is provided that includes providing a preform component. The preform component includes a blind aperture in an exterior of the preform component. The exterior of the preform component is machined to provide a machined component. An exterior of the machined component is inspected to determine a characteristic of the machined component, which characteristic of the machined component is associated with the blind aperture. Whether a feature of the machined component satisfies a standard is determined based on the characteristic of the machined component.
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6.
公开(公告)号:US20210400820A1
公开(公告)日:2021-12-23
申请号:US17465292
申请日:2021-09-02
Applicant: RAYTHEON COMPANY
Inventor: James E. Benedict , Gregory G. Beninati , Mikhail Pevzner , Thomas V. Sikina , Andrew R. Southworth
Abstract: A process of fabricating a circuit includes providing a first sheet of dielectric material including a first top surface having at least one first conductive trace and a second sheet of dielectric material including a second top surface having at least one second conductive trace, depositing a first solder bump on the at least one first conductive trace, applying the second sheet of dielectric material to the first sheet of dielectric material with bonding film sandwiched in between, bonding the first and second sheets of dielectric material to one another, and providing a conductive material to connect the first solder bump on the at least one first conductive trace to the at least one second conductive trace.
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公开(公告)号:US20210144864A1
公开(公告)日:2021-05-13
申请号:US16678188
申请日:2019-11-08
Applicant: RAYTHEON COMPANY
Inventor: Mikhail Pevzner , Gregory G. Beninati , James E. Benedict , Andrew R. Southworth
IPC: H05K3/46
Abstract: A process of fabricating an electromagnetic circuit includes providing three laminate sheets, forming a first feature in a first laminate sheet of the three laminate sheets, and forming a second feature in a second laminate sheet of the three laminate sheets. The second feature is aligned with the first feature when aligning the second laminate sheet with the first laminate sheet. The process further includes stacking the three laminate sheets so that the first laminate sheet is positioned above and aligned with the second laminate sheet and the second laminate sheet is positioned above and aligned with the third laminate sheet. The first feature and the second feature define a contiguous element. The process further includes filling the contiguous element with an electrically conductive material to form an electrically continuous conductor.
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公开(公告)号:US20230209728A1
公开(公告)日:2023-06-29
申请号:US18173390
申请日:2023-02-23
Applicant: RAYTHEON COMPANY
Inventor: Mikhail Pevzner , Gregory G. Beninati , James E. Benedict , Andrew R. Southworth
IPC: H05K3/46
CPC classification number: H05K3/465 , H05K3/4679
Abstract: A process of fabricating an electromagnetic circuit includes providing three laminate sheets, forming a first feature in a first laminate sheet of the three laminate sheets, and forming a second feature in a second laminate sheet of the three laminate sheets. The second feature is aligned with the first feature when aligning the second laminate sheet with the first laminate sheet. The process further includes stacking the three laminate sheets so that the first laminate sheet is positioned above and aligned with the second laminate sheet and the second laminate sheet is positioned above and aligned with the third laminate sheet. The first feature and the second feature define a contiguous element. The process further includes filling the contiguous element with an electrically conductive material to form an electrically continuous conductor.
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公开(公告)号:US11606865B2
公开(公告)日:2023-03-14
申请号:US16678188
申请日:2019-11-08
Applicant: RAYTHEON COMPANY
Inventor: Mikhail Pevzner , Gregory G. Beninati , James E. Benedict , Andrew R. Southworth
IPC: H05K3/46
Abstract: A process of fabricating an electromagnetic circuit includes providing three laminate sheets, forming a first feature in a first laminate sheet of the three laminate sheets, and forming a second feature in a second laminate sheet of the three laminate sheets. The second feature is aligned with the first feature when aligning the second laminate sheet with the first laminate sheet. The process further includes stacking the three laminate sheets so that the first laminate sheet is positioned above and aligned with the second laminate sheet and the second laminate sheet is positioned above and aligned with the third laminate sheet. The first feature and the second feature define a contiguous element. The process further includes filling the contiguous element with an electrically conductive material to form an electrically continuous conductor.
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公开(公告)号:US11317502B2
公开(公告)日:2022-04-26
申请号:US16874794
申请日:2020-05-15
Applicant: Raytheon Company
Inventor: Thomas V. Sikina , John P. Haven , James E. Benedict , William J. Clark , Channing P. Favreau , Erika Klek , Mikhail Pevzner , Donald G. Hersey , Gregory G. Beninati , Thomas J. Tellinghuisen
Abstract: Methods and apparatus for providing a cavity defined by conductive walls, a printed circuit board (PCB) within the cavity, and shorting posts extending into the cavity to suppress higher order modes generated by operation of the PCB.
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