Abstract:
One or more first signals and one or more second signals, wherein the second signal(s) are slowly varying or low frequency signals in comparison with the first signals and are converted from analog to digital by sampling the first signals and the second signals to produce samples thereof for analog-to-digital conversion, subjecting the samples of the first signals to conversion to digital at a certain conversion rate, subjecting the samples of the second signal to conversion to digital by segments so that these segments are subjected to conversion to digital along with the samples of the first signals at the respective conversion rate, and reconstructing digital converted samples of the second signal from the segments subjected to conversion to digital.
Abstract:
One or more first signals and one or more second signals, wherein the second signal(s) are slowly varying or low frequency signals in comparison with the first signals and are converted from analog to digital by sampling the first signals and the second signals to produce samples thereof for analog-to-digital conversion, subjecting the samples of the first signals to conversion to digital at a certain conversion rate, subjecting the samples of the second signal to conversion to digital by segments so that these segments are subjected to conversion to digital along with the samples of the first signals at the respective conversion rate, and reconstructing digital converted samples of the second signal from the segments subjected to conversion to digital.
Abstract:
A method for compensating non-linearities of a read signal generated by a variable-capacitance inertial sensor including a first fixed electrode and a second fixed electrode and a mobile electrode, which is spatially arranged between the first and second fixed electrodes and is capacitively coupled to the first and second fixed electrodes, said method comprising the steps of: acquiring the read signal; identifying a first linear component and at least one first nonlinear component of the read signal; a generating a compensated output signal by subtracting the first nonlinear component from the read signal.
Abstract:
Capacitance sensing circuits and methods are provided. A dual mode capacitance sensing circuit includes a capacitance-to-voltage converter having an amplifier and an integration capacitance coupled between an output and an inverting input of the amplifier, and a switching circuit responsive to mutual mode control signals for a controlling signal supplied from a capacitive touch matrix to the capacitive to voltage converter in a mutual capacitance sensing mode and responsive to self mode control signals for controlling signals supplied from the capacitive touch matrix to the capacitance-to-voltage converter in a self capacitance sensing mode, wherein the capacitance sensing circuit is configurable for operation in the mutual capacitance sensing mode or the self capacitance sensing mode.
Abstract:
Capacitance sensing circuits and methods are provided. The capacitance sensing circuit includes a capacitance-to-voltage converter configured to receive a signal from a capacitance to be sensed and to provide an output signal representative of the capacitance, an output chopper configured to convert the output signal of the capacitance-to-voltage converter to a sensed voltage representative of the capacitance to be sensed, an analog accumulator configured to accumulate sensed voltages during an accumulation period of NA sensing cycles and to provide an accumulated analog value, an amplifier configured to amplify the accumulated analog value, and an analog-to-digital converter configured to convert the amplified accumulated analog value to a digital value representative of the capacitance to be sensed. The analog accumulator may include a low pass filter having a frequency response to filter wideband noise.
Abstract:
One or more first signals and one or more second signals, wherein the second signal(s) are slowly varying or low frequency signals in comparison with the first signals and are converted from analog to digital by sampling the first signals and the second signals to produce samples thereof for analog-to-digital conversion, subjecting the samples of the first signals to conversion to digital at a certain conversion rate, subjecting the samples of the second signal to conversion to digital by segments so that these segments are subjected to conversion to digital along with the samples of the first signals at the respective conversion rate, and reconstructing digital converted samples of the second signal from the segments subjected to conversion to digital.
Abstract:
An oscillator circuit including a ring oscillator and a reference current source is provided. The ring oscillator includes an odd number of inverter stages. Each inverter stage includes a first transistor having a first reference threshold that varies over temperature. The reference current source is configured to generate a plurality of currents, where a respective current is applied directly to the drain of a respective first transistor of a respective inverter stage. The reference current source includes a reference transistor that has a second reference threshold that varies over temperature; a resistor coupled between a gate and a source of the reference transistor; a second transistor having a source coupled to the gate of the reference transistor for generating a reference current that flows through the resistor to regulate a voltage of the resistor to the second threshold voltage; and a current mirror configured to generate the plurality of currents.
Abstract:
A method for compensating non-linearities of a read signal generated by a variable-capacitance inertial sensor including a first fixed electrode and a second fixed electrode and a mobile electrode, which is spatially arranged between the first and second fixed electrodes and is capacitively coupled to the first and second fixed electrodes, said method comprising the steps of: acquiring the read signal; identifying a first linear component and at least one first nonlinear component of the read signal; a generating a compensated output signal by subtracting the first nonlinear component from the read signal.
Abstract:
Capacitance sensing circuits and methods are provided. A dual mode capacitance sensing circuit includes a capacitance-to-voltage converter having an amplifier and an integration capacitance coupled between an output and an inverting input of the amplifier, and a switching circuit responsive to mutual mode control signals for a controlling signal supplied from a capacitive touch matrix to the capacitive to voltage converter in a mutual capacitance sensing mode and responsive to self mode control signals for controlling signals supplied from the capacitive touch matrix to the capacitance-to-voltage converter in a self capacitance sensing mode, wherein the capacitance sensing circuit is configurable for operation in the mutual capacitance sensing mode or the self capacitance sensing mode.
Abstract:
One or more first signals and one or more second signals, wherein the second signal(s) are slowly varying or low frequency signals in comparison with the first signals and are converted from analog to digital by sampling the first signals and the second signals to produce samples thereof for analog-to-digital conversion, subjecting the samples of the first signals to conversion to digital at a certain conversion rate, subjecting the samples of the second signal to conversion to digital by segments so that these segments are subjected to conversion to digital along with the samples of the first signals at the respective conversion rate, and reconstructing digital converted samples of the second signal from the segments subjected to conversion to digital.