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公开(公告)号：US20220013984A1
公开(公告)日：2022-01-13
申请号：US17360381
申请日：2021-06-28
发明人： Romeo Letor , Vanni Poletto , Antoine Pavlin , Nadia Lecci , Alfio Russo
摘要： An embodiment pulse generator circuit comprises a first electronic switch coupled between first and second nodes, and a second electronic switch coupled between the second node and a reference node. An LC resonant circuit comprising an inductance and a capacitance is coupled between the first and reference nodes along with charge circuitry comprises a further inductance in a current flow line between a supply node and an intermediate node in the LC resonant circuit. Drive circuitry of the electronic switches repeats, during a sequence of switching cycles, charge time intervals, wherein the capacitance in the LC resonant circuit is charged via the charge circuit, and pulse generation time intervals, wherein a pulsed current is provided to the load via the first and second nodes. The charge and pulse generation time intervals are interleaved with oscillation time intervals where the LC resonant circuit oscillates at a resonance frequency.
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公开(公告)号：US11894657B2
公开(公告)日：2024-02-06
申请号：US17360381
申请日：2021-06-28
发明人： Romeo Letor , Vanni Poletto , Antoine Pavlin , Nadia Lecci , Alfio Russo
CPC分类号： H01S5/06216 , H01S5/0261 , H03K5/07
摘要： An embodiment pulse generator circuit comprises a first electronic switch coupled between first and second nodes, and a second electronic switch coupled between the second node and a reference node. An LC resonant circuit comprising an inductance and a capacitance is coupled between the first and reference nodes along with charge circuitry comprises a further inductance in a current flow line between a supply node and an intermediate node in the LC resonant circuit. Drive circuitry of the electronic switches repeats, during a sequence of switching cycles, charge time intervals, wherein the capacitance in the LC resonant circuit is charged via the charge circuit, and pulse generation time intervals, wherein a pulsed current is provided to the load via the first and second nodes. The charge and pulse generation time intervals are interleaved with oscillation time intervals where the LC resonant circuit oscillates at a resonance frequency.
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3.发明授权Electronic device for protecting against a polarity reversal of a DC power supply voltage, and its application to motor vehicles 有权用于防止直流电源电压的极性反转的电子装置及其应用于机动车辆公开(公告)号：US09142951B2
公开(公告)日：2015-09-22
申请号：US14041654
申请日：2013-09-30
发明人： Antoine Pavlin
IPC分类号： H02H3/18 , H01L27/02 , H01L27/088 , H02H11/00
CPC分类号： H02H3/18 , H01L27/0248 , H01L27/0251 , H01L27/088 , H02H11/003
摘要： Disclosed herein is a device comprising a protection circuit configured to protect against a polarity reversal of the input DC power supply voltage, the protection circuit comprising an N-channel main transistor having a source coupled to an input terminal and having a drain coupled to an output terminal, a command circuit configured to render the main transistor blocked in the event of a polarity reversal and conducting otherwise, and a control circuit configured to dynamically adjust the bias of substrate regions of respective components connected to the main transistor by connecting the substrate regions either to the source or to the drain of the main transistor according to the value of the voltages present at the source and the drain of the main transistor and the type of conductivity of the substrate regions.
摘要翻译： 本文公开了一种包括保护电路的装置，其被配置为防止输入DC电源电压的极性反转，该保护电路包括N沟道主晶体管，其具有耦合到输入端子的源极，并且具有耦合到输出的漏极 端子，命令电路，其被配置为在极性反转的情况下使主晶体管阻塞并且否则导通;以及控制电路，被配置为通过将衬底区域连接来动态地调节连接到主晶体管的各个部件的衬底区域的偏置 根据存在于主晶体管的源极和漏极上的电压值以及衬底区域的导电类型，到主晶体管的源极或漏极。
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4.发明申请Electronic Device for Protecting Against a Polarity Reversal of a DC Power Supply Voltage, and its Application to Motor Vehicles 审中-公开用于防止直流电源电压极性反转的电子装置及其在机动车辆上的应用公开(公告)号：US20140029146A1
公开(公告)日：2014-01-30
申请号：US14041654
申请日：2013-09-30
发明人： Antoine Pavlin
IPC分类号： H02H3/18
CPC分类号： H02H3/18 , H01L27/0248 , H01L27/0251 , H01L27/088 , H02H11/003
摘要： Disclosed herein is a device comprising a protection circuit configured to protect against a polarity reversal of the input DC power supply voltage, the protection circuit comprising an N-channel main transistor having a source coupled to an input terminal and having a drain coupled to an output terminal, a command circuit configured to render the main transistor blocked in the event of a polarity reversal and conducting otherwise, and a control circuit configured to dynamically adjust the bias of substrate regions of respective components connected to the main transistor by connecting the substrate regions either to the source or to the drain of the main transistor according to the value of the voltages present at the source and the drain of the main transistor and the type of conductivity of the substrate regions.
摘要翻译： 本文公开了一种包括保护电路的装置，其被配置为防止输入DC电源电压的极性反转，该保护电路包括N沟道主晶体管，其具有耦合到输入端子的源极，并且具有耦合到输出的漏极 端子，命令电路，其被配置为在极性反转的情况下使主晶体管阻塞并且否则导通;以及控制电路，被配置为通过将衬底区域连接来动态地调节连接到主晶体管的各个部件的衬底区域的偏置 根据存在于主晶体管的源极和漏极上的电压值以及衬底区域的导电类型，到主晶体管的源极或漏极。
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5.发明公开公开(公告)号：US20240204478A1
公开(公告)日：2024-06-20
申请号：US18533585
申请日：2023-12-08
发明人： Romeo Letor , Alfio Russo , Nadia Lecci , Antonio Filippo Massimo Pizzardi , Antoine Pavlin , Vanni Poletto , Marco Brera , Simone Bianchi
IPC分类号： H01S5/026 , G01S7/481 , H01S5/02326 , H01S5/40
CPC分类号： H01S5/0261 , G01S7/4814 , H01S5/02326 , H01S5/4025
摘要： In a driver circuit couplable to laser diodes, a semiconductor body has a first surface. First and second control switches have drains coupled to a drain metallization, which is couplable to a power supply line, and sources coupled to respective first and second source metallizations, which are couplable to cathode terminals of the laser diodes and a reference node. A plurality of high-side switches have drains coupled to the drain metallization and sources coupled to third source metallizations, each of which is coupled to a respective drive output node for driving an anode terminal of a respective laser diode. The drain, first, second and third source metallizations face the first surface of the semiconductor body, which faces the laser diodes. The second and third source metallizations are aligned with one another and are superimposed to the respective source terminals of the second control switch and high-side switches.
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公开(公告)号：US20220014187A1
公开(公告)日：2022-01-13
申请号：US17338157
申请日：2021-06-03
发明人： Romeo Letor , Vanni Poletto , Antoine Pavlin , Alfio Russo , Nadia Lecci
IPC分类号： H03K17/687 , H01S5/042
摘要： In accordance with an embodiment, a pulse generator circuit includes: an LC resonant circuit coupled between a first node and a reference node; a first switch coupled between the first node and the reference node; a switching network comprising a second switch coupled between the first node and a respective drive node; and drive circuit having outputs coupled to the first switch and to the second switch of the switching network. The drive circuit configured to, in repeating cycles: close the first switch when a current flowing through an inductor of the LC resonant circuit increases during a resonant cycle, when the current flowing through the inductor reaches a threshold value, open the first switch, close the second switch of the switching network for a pulse duration time when the first switch is open, and open the second switch at an expiration of the pulse duration time.
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公开(公告)号：US12113444B2
公开(公告)日：2024-10-08
申请号：US17856657
申请日：2022-07-01
发明人： Vanni Poletto , Antoine Pavlin
CPC分类号： H02M3/1586 , B60L53/22 , B60L58/20 , B60L2210/12 , B60L2210/14
摘要： In an embodiment, a phase circuit includes: a bidirectional output stage configured to be coupled between a first battery and a second battery; a memory configured to store a number of active phases, and an identifier; and a synchronization circuit configured to receive a first clock signal and determine a start time of a switching cycle of the bidirectional output stage based on the number of active phases, the identifier, and the first clock signal, where the phase circuit is configured to control the timing of the switching of the bidirectional output stage based on the start time.
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公开(公告)号：US20240006998A1
公开(公告)日：2024-01-04
申请号：US17856657
申请日：2022-07-01
发明人： Vanni Poletto , Antoine Pavlin
CPC分类号： H02M3/1586 , B60L53/22 , B60L58/20 , B60L2210/12 , B60L2210/14
摘要： In an embodiment, a phase circuit includes: a bidirectional output stage configured to be coupled between a first battery and a second battery; a memory configured to store a number of active phases, and an identifier; and a synchronization circuit configured to receive a first clock signal and determine a start time of a switching cycle of the bidirectional output stage based on the number of active phases, the identifier, and the first clock signal, where the phase circuit is configured to control the timing of the switching of the bidirectional output stage based on the start time.
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公开(公告)号：US20210218223A1
公开(公告)日：2021-07-15
申请号：US17123712
申请日：2020-12-16
发明人： Romeo Letor , Antoine Pavlin , Alfio Russo , Nadia Lecci
IPC分类号： H01S5/042 , G01S7/484 , H03K17/687
摘要： An embodiment pulse generator circuit is configured to apply a current pulse to two output terminals. The pulse generator circuit comprises an LC resonant circuit comprising an inductance and a capacitance connected in series between a first node and a negative input terminal. The pulse generator circuit comprises a charge circuit configured to charge the capacitance via a supply voltage, a first electronic switch configured to selectively short-circuit the two output terminals, a second electronic switch configured to selectively connect the two output terminals in parallel with the LC resonant circuit, and a control circuit configured to drive the first and the second electronic switch.
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公开(公告)号：US20190131197A1
公开(公告)日：2019-05-02
申请号：US16169700
申请日：2018-10-24
IPC分类号： H01L23/31 , H01L23/495 , H01L23/00
摘要： An electronic circuit can include a semiconductor chip having a thickness smaller than 160 μm and a package with flush contacts having the chip encapsulated therein. In some cases, the chip takes up more than twenty-five percent of the surface area of the package. The package can be a quad flat no-lead (QFN) package.
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