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1.发明授权Adaptive delay based asynchronous successive approximation analog-to-digital converter 有权基于自适应延迟的异步逐次逼近模数转换器公开(公告)号：US09300317B2
公开(公告)日：2016-03-29
申请号：US14930708
申请日：2015-11-03
Applicant: STMicroelectronics International N.V.
Inventor： Rakesh Malik , Chandrajit Debnath , Ashish Sharma Kumar , Pratap Narayan Singh
CPC classification number: H03M1/125 , H03M1/00 , H03M1/0612 , H03M1/069 , H03M1/0695 , H03M1/12 , H03M1/46 , H03M1/462
Abstract: An asynchronous SAR ADC converts an analog signal into a series of digital pulses in an efficient, low power manner. In synchronous SAR ADC circuits, a separate and cumbersome clock signal is used to trigger the internal circuitry of the SAR ADC. Instead of triggering the components of the SAR DAC synchronously with a clock signal, the asynchronous solution uses its own internal signals to trigger its components in an asynchronous cyclic manner. Further, in order to increase efficiency and guard against circuit failures due to difficulties arising from transient signals, the asynchronous SAR ADC may also include a delay circuit for introducing a variable delay to the SAR ADC cycle.
Abstract translation: 异步SAR ADC以有效，低功耗的方式将模拟信号转换为一系列数字脉冲。 在同步SAR ADC电路中，单独和繁琐的时钟信号用于触发SAR ADC的内部电路。 异步解决方案不是以时钟信号同步触发SAR DAC的组件，而是以其自身的内部信号以异步循环方式触发其组件。 此外，为了提高效率并防止由于瞬态信号引起的困难而导致的电路故障，异步SAR ADC还可以包括用于将可变延迟引入SAR ADC周期的延迟电路。
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2.发明授权Adaptive delay based asynchronous successive approximation analog-to-digital converter 有权基于自适应延迟的异步逐次逼近模数转换器公开(公告)号：US09258008B2
公开(公告)日：2016-02-09
申请号：US14230370
申请日：2014-03-31
Applicant: STMicroelectronics International N.V.
Inventor： Pratap Narayan Singh , Ashish Sharma Kumar , Chandrajit Debnath , Rakesh Malik
CPC classification number: H03M1/125 , H03M1/00 , H03M1/0612 , H03M1/069 , H03M1/0695 , H03M1/12 , H03M1/46 , H03M1/462
Abstract: An asynchronous SAR ADC to convert an analog signal into a series of digital pulses in an efficient, low power manner. In synchronous SAR ADC circuits, a separate and cumbersome clock signal is used to trigger the internal circuitry of the SAR ADC. Instead of triggering the components of the SAR DAC synchronously with a clock signal, the asynchronous solution uses its own internal signals to trigger its components in an asynchronous cyclic manner. Further, in order to increase efficiency and guard against circuit failures due to difficulties arising from transient signals, the asynchronous SAR ADC may also include a delay circuit for introducing a variable delay to the SAR ADC cycle.
Abstract translation: 异步SAR ADC，以高效，低功耗的方式将模拟信号转换为一系列数字脉冲。 在同步SAR ADC电路中，单独和繁琐的时钟信号用于触发SAR ADC的内部电路。 异步解决方案不是以时钟信号同步触发SAR DAC的组件，而是以其自身的内部信号以异步循环方式触发其组件。 此外，为了提高效率并防止由于瞬态信号引起的困难而导致的电路故障，异步SAR ADC还可以包括用于将可变延迟引入SAR ADC周期的延迟电路。
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公开(公告)号：US20170288693A1
公开(公告)日：2017-10-05
申请号：US15465305
申请日：2017-03-21
Applicant: STMicroelectronics International N.V.
Inventor： Ashish Sharma Kumar , Rajeev Jain , Chandrajit Debnath
Abstract: A wide band continuous time delta-sigma modulator implements a time interleaved quantization processing operation. The modulator may provide for an inherent finite impulse response filtering in the feedback loop. Additionally, further finite impulse response filtering in each time interleaved feedback path may be provided.
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4.发明申请ADAPTIVE DELAY BASED ASYNCHRONOUS SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER 审中-公开基于自适应延迟的异步连续逼近模拟数字转换器公开(公告)号：US20160056830A1
公开(公告)日：2016-02-25
申请号：US14930708
申请日：2015-11-03
Applicant: STMicroelectronics International N.V.
Inventor： Rakesh Malik , Chandrajit Debnath , Ashish Sharma Kumar , Pratap Narayan Singh
CPC classification number: H03M1/125 , H03M1/00 , H03M1/0612 , H03M1/069 , H03M1/0695 , H03M1/12 , H03M1/46 , H03M1/462
Abstract: An asynchronous SAR ADC converts an analog signal into a series of digital pulses in an efficient, low power manner. In synchronous SAR ADC circuits, a separate and cumbersome clock signal is used to trigger the internal circuitry of the SAR ADC. Instead of triggering the components of the SAR DAC synchronously with a clock signal, the asynchronous solution uses its own internal signals to trigger its components in an asynchronous cyclic manner. Further, in order to increase efficiency and guard against circuit failures due to difficulties arising from transient signals, the asynchronous SAR ADC may also include a delay circuit for introducing a variable delay to the SAR ADC cycle.
Abstract translation: 异步SAR ADC以有效，低功耗的方式将模拟信号转换为一系列数字脉冲。 在同步SAR ADC电路中，单独和繁琐的时钟信号用于触发SAR ADC的内部电路。 异步解决方案不是以时钟信号同步触发SAR DAC的组件，而是以其自身的内部信号以异步循环方式触发其组件。 此外，为了提高效率并防止由于瞬态信号引起的困难而导致的电路故障，异步SAR ADC还可以包括用于将可变延迟引入SAR ADC周期的延迟电路。
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