公开(公告)号：US20240355383A1

公开(公告)日：2024-10-24

申请号：US18637823

申请日：2024-04-17

申请人： ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY ,  THE RESEARCH FOUNDATION FOR THE STATE UNIVERISTY OF NEW YORK

发明人： Arindam SANYAL ,  Jae-sun SEO ,  Vasundhara DAMODARAN ,  Ziyu LIU

IPC分类号： G11C11/419 ,  H03M3/00

CPC分类号： G11C11/419 ,  H03M3/494

摘要： System and method to improve the linearity of vector matrix multipliers (VMMs) by including (1) delta-sigma modulators that convert the input and output activations into binary pulse trains, (2) charge-domain computation in each SRAM cell that removes the nonlinear dependency on bitline voltage of the result of the multiplication and allows rail-to-rail output swing, and (3) a CMOS switch that transmits input activation to the capacitor in the SRAM cell, which improves linearity by suppressing the switch threshold voltage dependence on input activation voltage.

公开(公告)号：US11789046B2

公开(公告)日：2023-10-17

申请号：US17407725

申请日：2021-08-20

申请人： STMicroelectronics S.r.l.

发明人： Davide Argento ,  Orazio Pennisi ,  Stefano Castorina ,  Vanni Poletto ,  Matteo Landini ,  Andrea Maino

IPC分类号： G01R19/10 ,  H03M1/12 ,  H03M3/00 ,  B60R21/017

CPC分类号： G01R19/10 ,  B60R21/0173 ,  H03M1/124 ,  H03M3/464 ,  H03M3/494

摘要： A system and method is provided for measuring a voltage drop at a node. In embodiments, a circuit includes an analog-to-digital converter, a current sink, and a controller. The input of the analog-to-digital converter and the input of the current sink is coupled to the node to be measured. A set point for the current sink is determined. The output of the analog-to-digital converter during the voltage drop is sampled. And a relative voltage drop value is computed by subtracting the sampled output of the analog-to-digital converter during the voltage drop from a sampled output of the analog-to-digital converter during a steady-state condition. The current sink operating at the set point during the steady-state condition and during the voltage drop.

公开(公告)号：US20190149163A1

公开(公告)日：2019-05-16

申请号：US15809284

申请日：2017-11-10

申请人： Synaptics Incorporated

发明人： Eric Scott Bohannon

IPC分类号： H03M3/00 ,  H03K17/96 ,  G06F3/044 ,  G06F3/041

CPC分类号： H03M3/322 ,  G06F3/0418 ,  G06F3/044 ,  H03K17/962 ,  H03K2217/960705 ,  H03K2217/960735 ,  H03M3/32 ,  H03M3/462 ,  H03M3/464 ,  H03M3/494

摘要： An analog front end (AFE) for an input device includes a current conveyor and an analog-to-digital converter (ADC) switchably coupled to the current conveyor. The current conveyor is configured to receive an input signal from a plurality of sensor electrodes. The ADC generates an output value corresponding to a digital representation of the input signal when the ADC is coupled to the current conveyor. Further, the ADC may selectively adjust the output value based at least in part on a state of the ADC when the ADC is decoupled from the current conveyor. In some implementations, the ADC may include a delta-sigma modulator configured to generate an additional sample when the ADC is decoupled from the current conveyor. The ADC may determine an amount of quantization error in the output value based on the additional sample, and adjust the output value when the quantization error exceeds a threshold amount.

公开(公告)号：US20190020352A1

公开(公告)日：2019-01-17

申请号：US16015585

申请日：2018-06-22

申请人： Avinash Gutta ,  Venkata Aruna Srikanth Nittala

发明人： Avinash Gutta ,  Venkata Aruna Srikanth Nittala

IPC分类号： H03M3/00 ,  H03H11/04

CPC分类号： H03M3/322 ,  H03H1/02 ,  H03H7/06 ,  H03H7/425 ,  H03H11/04 ,  H03M3/344 ,  H03M3/392 ,  H03M3/422 ,  H03M3/452 ,  H03M3/494

摘要： Techniques for a configurable analog-to-digital converter filter to ameliorate transfer function peaking or frequency response issues are provided. In an example, a front-end circuit of a processing circuit can include a resistor-capacitor filter including at least two capacitors and a switch circuit. The resistor-capacitor filter can couple an input analog signal to the processing circuit. The switch circuit can couple to a first capacitor of the at least two capacitors, and can selectively place a terminal of the first capacitor at a selected one of a plurality of distinct nodes of the resistor-capacitor filter to configure the circuit to address the peaking or frequency response issue.

公开(公告)号：US09729164B2

公开(公告)日：2017-08-08

申请号：US14826996

申请日：2015-08-14

申请人： Cirrus Logic International Semiconductor Ltd.

发明人： Ramin Zanbaghi ,  Yousof Mortazavi ,  Aaron Brennan ,  John L. Melanson

IPC分类号： H03M1/12 ,  H03M1/14 ,  H03M3/00 ,  H04R19/04 ,  G06F3/16

CPC分类号： H03M1/14 ,  G06F3/16 ,  G11C27/024 ,  H03F3/005 ,  H03F3/45475 ,  H03F3/45959 ,  H03F2203/45421 ,  H03F2203/45512 ,  H03F2203/45544 ,  H03F2203/45551 ,  H03M1/124 ,  H03M1/1295 ,  H03M3/458 ,  H03M3/494 ,  H03M3/496 ,  H04R3/00 ,  H04R19/04 ,  H04R29/004 ,  H04R2499/11

摘要： One method of processing microphone input in an ADC to determine microphone configuration is to process the microphone input signals in two processing paths, in which one processing path processes a difference between differential input signals and another processing path processes an average value of the differential input signals. The outputs of these processing paths may be combined to generate a digital signal representative of the analog signal from the microphone. The digital signal contains a digital version of the audio in the environment around the microphone, but may also be used to detect microphone topology and configure aspects of the processing paths to match the detected microphone topology. An apparatus for an ADC may implement the two processing paths as two delta-sigma modulator loops.

公开(公告)号：US20170047938A1

公开(公告)日：2017-02-16

申请号：US14826996

申请日：2015-08-14

申请人： Cirrus Logic International Semiconductor Ltd.

发明人： Ramin Zanbaghi ,  Yousof Mortazavi ,  Aaron Brennan ,  John L. Melanson

IPC分类号： H03M1/14 ,  H03M3/00 ,  G06F3/16

CPC分类号： H03M1/14 ,  G06F3/16 ,  G11C27/024 ,  H03F3/005 ,  H03F3/45475 ,  H03F3/45959 ,  H03F2203/45421 ,  H03F2203/45512 ,  H03F2203/45544 ,  H03F2203/45551 ,  H03M1/124 ,  H03M1/1295 ,  H03M3/458 ,  H03M3/494 ,  H03M3/496 ,  H04R3/00 ,  H04R19/04 ,  H04R29/004 ,  H04R2499/11

摘要： One method of processing microphone input in an ADC to determine microphone configuration is to process the microphone input signals in two processing paths, in which one processing path processes a difference between differential input signals and another processing path processes an average value of the differential input signals. The outputs of these processing paths may be combined to generate a digital signal representative of the analog signal from the microphone. The digital signal contains a digital version of the audio in the environment around the microphone, but may also be used to detect microphone topology and configure aspects of the processing paths to match the detected microphone topology. An apparatus for an ADC may implement the two processing paths as two delta-sigma modulator loops.

摘要翻译： 在ADC中处理麦克风输入以确定麦克风配置的一种方法是在两个处理路径中处理麦克风输入信号，其中一个处理路径处理差分输入信号之间的差异和另一个处理路径处理差分输入信号的平均值 。 这些处理路径的输出可以被组合以产生表示来自麦克风的模拟信号的数字信号。 数字信号包含麦克风周围环境中的音频的数字版本，但也可用于检测麦克风拓扑并配置处理路径的各个方面以匹配检测到的麦克风拓扑结构。 用于ADC的装置可以将两个处理路径实现为两个Δ-Σ调制器环路。

公开(公告)号：US20140368222A1

公开(公告)日：2014-12-18

申请号：US14301462

申请日：2014-06-11

申请人： Microchip Technology Incorporated

发明人： Keith Curtis

IPC分类号： G01D5/24

CPC分类号： G01D5/2405 ,  G01D5/24 ,  G01R27/26 ,  G01R27/2605 ,  G05B2219/37284 ,  H03K17/955 ,  H03K2217/960725 ,  H03M3/456 ,  H03M3/462 ,  H03M3/494

摘要： Capacitive proximity detection is provided by combining a delta-sigma modulator and a capacitive voltage divider circuit to create a high resolution capacitive-to-digital converter. Period and duty cycle counters provide duty cycle ratios from the delta-sigma modulator for comparison of changes in capacitance values of a capacitive sensor when an object is in proximity thereto.

摘要翻译： 通过组合Δ-Σ调制器和电容分压器电路来产生电容式接近检测以产生高分辨率电容 - 数字转换器。 周期和占空比计数器提供来自Δ-Σ调制器的占空比，用于比较当物体在其附近时电容传感器的电容值的变化。

公开(公告)号：US08766835B2

公开(公告)日：2014-07-01

申请号：US13400312

申请日：2012-02-20

申请人： Peyman Hojabri ,  Dongwei Chen

发明人： Peyman Hojabri ,  Dongwei Chen

IPC分类号： H03M3/00

CPC分类号： H03M3/458 ,  H03M3/30 ,  H03M3/43 ,  H03M3/454 ,  H03M3/494

摘要： Continuous time sigma delta (ΣΔ) analog-to-digital conversion (ADC) circuitry and method in which current mode ΣΔ ADC circuitry is driven directly by current mode mixing circuitry, thereby avoiding a need for a current-to-voltage driver between the input signal mixing circuitry and ΣΔ ADC circuitry.

摘要翻译： 连续时间Σ-Δ（＆Sgr＆amp; Dgr）模数转换（ADC）电路和方法，其中电流模式＆amp; ADC电路由电流模式混合电路直接驱动，从而避免了在输入信号混合电路和S＆amp; Dgr之间的电流 - 电压驱动器的需要。 ADC电路。

公开(公告)号：US08378868B2

公开(公告)日：2013-02-19

申请号：US12939486

申请日：2010-11-04

申请人： Umar Jameer Lyles ,  Bertan Bakkaloglu ,  Brian P. Lum-Shue-Chan

发明人： Umar Jameer Lyles ,  Bertan Bakkaloglu ,  Brian P. Lum-Shue-Chan

IPC分类号： H03M3/00 ,  H02J7/00

CPC分类号： H03M1/124 ,  G01R31/3658 ,  H01M10/482 ,  H03M3/494

摘要： Systems and methods for analog to digital conversion charge storage device measurement are presented. In multi-cell charge storage device monitoring systems, accurate measurement of cell voltages is used for protection of the multi-cell device. The disclosed cell referenced solution converts the cell voltage to a digital representation referenced at the cell voltage. The digital representation referenced to the cell voltage is then level shifted to a ground referenced signal suitable for digital post processing. This processing may be used for fault detection of over-voltage, under-voltage, open cell, and similar fault conditions and cell capacity measurements. An example embodiment implements a sigma delta modulator to perform the signal transformation from analog to digital. The disclosed systems and methods may be differential and stackable for multiple cells.

摘要翻译： 提出了模数转换电荷存储器件测量的系统和方法。 在多单元电荷存储装置监视系统中，使用单元电压的精确测量来保护多单元装置。 所公开的电池参考解决方案将电池电压转换为以电池电压参考的数字表示。 然后将电池电压参考的数字表示电平移位到适合于数字后处理的地参考信号。 该处理可用于过电压，欠压，开放电池以及类似故障条件和电池容量测量的故障检测。 示例性实施例实现了Σ-Δ调制器来执行从模拟到数字的信号变换。 所公开的系统和方法可以是多个小区的差分和可堆叠的。

公开(公告)号：US20120056661A1

公开(公告)日：2012-03-08

申请号：US12877111

申请日：2010-09-08

申请人： Ayman Shabra

发明人： Ayman Shabra

IPC分类号： H03K17/687

CPC分类号： H03K17/693 ,  H03K17/6871 ,  H03K2217/0054 ,  H03M3/474 ,  H03M3/494

摘要： This invention features a high voltage multiplexer element including a voltage to current converting input resistance connected to the input of the element, first and second MOSFET switches connected in series between the input resistance and the output of the multiplexer element, and a third MOS switch connected between the junction of the first and second MOSFET switches and a voltage equal to or less than the supply; the first MOSFET switch being drain engineered and having drain-source breakdown voltage higher than the supply.

摘要翻译： 本发明的特征在于一种高电压多路复用器元件，包括电压到电流转换连接到元件的输入端的输入电阻，第一和第二MOSFET开关串联连接在输入电阻和多路复用器元件的输出之间，第三MOS开关连接 在第一和第二MOSFET开关的接合点和等于或小于电源的电压之间; 第一个MOSFET开关被漏极设计，并具有高于电源的漏极 - 源极击穿电压。