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公开(公告)号：US10862487B2
公开(公告)日：2020-12-08
申请号：US16674207
申请日：2019-11-05
Applicant: STMicroelectronics International N.V.
Inventor： Anand Kumar , Nitin Gupta , Nitin Jain
Abstract: A circuit includes a frequency detector generating a comparison signal as a function of a comparison between a reference signal and a feedback signal. An oscillator generates an output signal as a function of the comparison signal. A frequency divider, in operation, divides the output signal by a division value to produce the feedback signal as having a frequency that is a multiple of a frequency of the reference signal. A frequency counter circuit measures the frequency of the reference signal and generates a count signal based thereupon. A control circuit adjusts the division value used by the frequency divider, in operation, based upon the count signal.
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公开(公告)号：US08649230B2
公开(公告)日：2014-02-11
申请号：US14014208
申请日：2013-08-29
Applicant: STMicroelectronics International N.V.
Inventor： Siddharth Gupta , Nitin Jain , Anand Kumar Mishra
IPC: G11C7/22
CPC classification number: G11C7/1096 , G11C7/18 , G11C7/22 , G11C8/12 , G11C8/18 , G11C11/413
Abstract: A memory architecture includes a plurality of local input and output circuitries, with each local input and output circuitry associated with at least one memory bank. The memory architecture also includes a global input and output circuitry, which includes a plurality of global sub-write circuitries, is coupled to the plurality of local input and output circuitries One global sub-write circuitry is enabled and provides a write-data to a selected local input and output circuitry.
Abstract translation: 存储器架构包括多个本地输入和输出电路，其中每个本地输入和输出电路与至少一个存储体相关联。 存储器架构还包括全局输入和输出电路，其包括多个全局子写入电路，耦合到多个本地输入和输出电路。一个全局子写入电路被使能，并将写数据提供给 选择本地输入和输出电路。
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公开(公告)号：US11901865B2
公开(公告)日：2024-02-13
申请号：US17931863
申请日：2022-09-13
Applicant: STMicroelectronics International N.V.
Inventor： Anand Kumar , Nitin Jain
CPC classification number: H03B5/364 , H03B5/06 , H03B5/366 , H03B2200/0082 , H03B2200/0094
Abstract: A low power crystal oscillator circuit having a high power part and a low power part. Oscillation is initialized using the high power part. Once the crystal is under stable oscillation, the circuit switches to the low power part and continue operation for a long duration.
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Patent Agency Ranking
公开(公告)号：US09461584B2
公开(公告)日：2016-10-04
申请号：US14576535
申请日：2014-12-19
Applicant: STMicroelectronics International N.V.
Inventor： Gauri Mittal , Kallol Chatterjee , Pallavi Muktesh , Nitin Jain , Pradeep Kumar Badrathwal
IPC: H03B5/36
CPC classification number: H03B5/364 , H03B5/366 , H03B2200/0012 , H03B2200/0038
Abstract: A circuit includes an oscillator circuit to receive a bias current and generate an oscillating signal at an output node. A current differencing circuit subtracts a current at the output node from a reference current to generate a first current. In addition, a current mirroring circuit mirrors the first current to generate the bias current. An inverter stage is coupled to the output node, and includes an input branch configured to receive the oscillating signal and generate first and second control signals based upon the oscillating signal. At least one amplifying branch receives the first and second control signals and amplifies the first and second control signals. An output branch receives the amplified first and second control signals and generates an amplified version of the oscillating signal based upon the amplified first and second control signals.
Abstract translation: 电路包括用于接收偏置电流并在输出节点产生振荡信号的振荡器电路。 电流差分电路从参考电流中减去输出节点处的电流以产生第一电流。 此外，电流镜像电路反射第一电流以产生偏置电流。 逆变器级耦合到输出节点，并且包括被配置为接收振荡信号并基于振荡信号产生第一和第二控制信号的输入分支。 至少一个放大支路接收第一和第二控制信号并放大第一和第二控制信号。 输出分支接收放大的第一和第二控制信号，并且基于放大的第一和第二控制信号产生振荡信号的放大版本。
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公开(公告)号：US12224710B2
公开(公告)日：2025-02-11
申请号：US18463212
申请日：2023-09-07
Applicant: STMicroelectronics International N.V.
Inventor： Anand Kumar , Nitin Jain
Abstract: A low power crystal oscillator circuit having a high power part and a low power part. Oscillation is initialized using the high power part. Once the crystal is under stable oscillation, the circuit switches to the low power part and continue operation for a long duration.
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公开(公告)号：US11082006B2
公开(公告)日：2021-08-03
申请号：US16703250
申请日：2019-12-04
Applicant: STMicroelectronics International N.V.
Inventor： Anand Kumar , Nitin Jain
Abstract: A clock signal is generated with an oscillator. A crystal oscillator core within the oscillator circuit is switched on to produce first and second oscillation signals that are approximately opposite in phase. When a difference between a voltage of the first oscillation signal and a voltage of the second oscillation signal exceeds an upper threshold range, the crystal oscillator core is switched off. When the difference between the voltage of the first oscillation signal and the voltage of the second oscillation signal falls below the upper threshold range, the crystal oscillator core is switched back on. This operation is repeated so as to produce the clock signal.
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公开(公告)号：US20180287617A1
公开(公告)日：2018-10-04
申请号：US15475274
申请日：2017-03-31
Applicant: STMicroelectronics International N.V.
Inventor： Anand Kumar , Nitin Gupta , Nitin Jain
Abstract: An electronic device disclosed herein includes a locked loop circuit configured to receive a reference signal intended to have an intended frequency, wherein the locked look circuit is intended to generate an intended output signal having an intended frequency equal to the intended frequency multiplied by an intended multiplier. A frequency counter counts a number of pulses of the reference signal during a time window so as to determine an actual frequency of the reference signal. A control circuit determines an actual multiplier for the locked loop circuit that, when multiplied by the actual frequency of the reference signal, causes the locked loop circuit to generate an actual output signal having an actual frequency equal to the intended frequency.
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公开(公告)号：US20160181978A1
公开(公告)日：2016-06-23
申请号：US14576535
申请日：2014-12-19
Applicant: STMICROELECTRONICS INTERNATIONAL N.V.
Inventor： Gauri Mittal , Kallol Chatterjee , Pallavi Muktesh , Nitin Jain , Pradeep Kumar Badrathwal
IPC: H03B5/36
CPC classification number: H03B5/364 , H03B5/366 , H03B2200/0012 , H03B2200/0038
Abstract: A circuit includes an oscillator circuit to receive a bias current and generate an oscillating signal at an output node. A current differencing circuit subtracts a current at the output node from a reference current to generate a first current. In addition, a current mirroring circuit mirrors the first current to generate the bias current. An inverter stage is coupled to the output node, and includes an input branch configured to receive the oscillating signal and generate first and second control signals based upon the oscillating signal. At least one amplifying branch receives the first and second control signals and amplifies the first and second control signals. An output branch receives the amplified first and second control signals and generates an amplified version of the oscillating signal based upon the amplified first and second control signals.
Abstract translation: 电路包括用于接收偏置电流并在输出节点产生振荡信号的振荡器电路。 电流差分电路从参考电流中减去输出节点处的电流以产生第一电流。 此外，电流镜像电路反射第一电流以产生偏置电流。 逆变器级耦合到输出节点，并且包括被配置为接收振荡信号并基于振荡信号产生第一和第二控制信号的输入分支。 至少一个放大支路接收第一和第二控制信号并放大第一和第二控制信号。 输出分支接收放大的第一和第二控制信号，并且基于放大的第一和第二控制信号产生振荡信号的放大版本。
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