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公开(公告)号：US20200014372A1
公开(公告)日：2020-01-09
申请号：US16027762
申请日：2018-07-05
Applicant: STMicroelectronics International N.V.
Inventor： Rajesh Narwal , Pravesh Kumar Saini
Abstract: An RC oscillator generates a periodic trigger signal, and a clock generator generates clock edges in response. A stuck-at-fault detection circuit detects a stuck-at-logic state of the periodic trigger signal and causes the RC oscillator to reset and causes a change in logic state of the periodic trigger signal.The RC oscillator includes first and second comparison circuits, a logic circuit receiving output from the first and second comparison circuits and generating the periodic trigger signal, and a clock generation circuit generating a clock signal therefrom.The stuck-at-fault detection circuit includes a capacitive node, charge circuitry charging the capacitive node based upon the periodic trigger signal, discharge circuitry discharging the capacitive node based upon the periodic trigger signal, and triggering circuitry asserting a reset signal to cause the RC oscillator to reset when the charge on the capacitive node indicates a stuck-at-logic state of the periodic trigger signal.
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公开(公告)号：US20220057446A1
公开(公告)日：2022-02-24
申请号：US17001131
申请日：2020-08-24
Applicant: STMicroelectronics International N.V.
Inventor： Pravesh Kumar Saini , Shashawat
IPC: G01R31/28 , G01R31/52 , H03K19/20 , H03K17/687
Abstract: An on chip leakage-current detection device including a first inverter where the magnitude of delay of the output signal of the first inverter is determined by a leakage current of a target device. The leakage-current detection device further includes: a capacitor that is charged by the output signal of the first inverter; a second inverter coupled to capacitor that switches states when the capacitor is charged to a switching level; an odd number of additional inverters coupled in a sequence with a second-inverter output. The output of the leakage-current detection device has a frequency proportional to the leakage of the target device.
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Patent Agency Ranking
公开(公告)号：US10651641B2
公开(公告)日：2020-05-12
申请号：US15637766
申请日：2017-06-29
Inventor： Mauro Giacomini , Rajesh Narwal , Pravesh Kumar Saini
Abstract: A circuit includes an input terminal and a regulated supply line for supplying an electronic device with an electrostatic discharge protection and driver circuit for the electronic device. The supply line is coupled to the input terminal via the circuitry, so that current injected into the input terminal may produce a voltage increase on the regulated supply line. A comparator sensitive to the voltage at the input terminal and the voltage on the supply line is provided. A current sink coupled with the supply line and being activatable to sink current from the supply line is also provided. The comparator is configured for activating the current sink as a result of the voltage at the input terminal exceeding the voltage on the supply line of a certain intervention threshold.
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公开(公告)号：US20180175606A1
公开(公告)日：2018-06-21
申请号：US15637766
申请日：2017-06-29
Inventor： Mauro Giacomini , Rajesh Narwal , Pravesh Kumar Saini
CPC classification number: H02H3/087 , H01L27/0248 , H02H3/04 , H02H3/20 , H02H7/20 , H02H9/042 , H02H9/046 , H02J9/061
Abstract: A circuit includes an input terminal and a regulated supply line for supplying an electronic device with an electrostatic discharge protection and driver circuit for the electronic device. The supply line is coupled to the input terminal via the circuitry, so that current injected into the input terminal may produce a voltage increase on the regulated supply line. A comparator sensitive to the voltage at the input terminal and the voltage on the supply line is provided. A current sink coupled with the supply line and being activatable to sink current from the supply line is also provided. The comparator is configured for activating the current sink as a result of the voltage at the input terminal exceeding the voltage on the supply line of a certain intervention threshold.
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公开(公告)号：US11606029B2
公开(公告)日：2023-03-14
申请号：US17016588
申请日：2020-09-10
Applicant: STMicroelectronics International N.V.
Inventor： Pravesh Kumar Saini
Abstract: A power transistor and a cascode transistor are connected in series. A driver circuit has an output driving a control terminal of the power transistor. The driver circuit has a first power supply node coupled to receive a floating voltage that is also applied to a control terminal of the cascode transistor. A variable voltage generator generates the floating voltage. The floating voltage track either a power supply voltage or a reference voltage over a first range of voltage levels for the power supply voltage. The floating voltage further satisfies a ratio metric relationship dependent on the power supply voltage and reference voltage over a second range of voltage levels for said power supply voltage.
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公开(公告)号：US11313900B2
公开(公告)日：2022-04-26
申请号：US17001131
申请日：2020-08-24
Applicant: STMicroelectronics International N.V.
Inventor： Pravesh Kumar Saini , Shashwat
IPC: G01R31/28 , H03K17/687 , H03K19/20 , G01R31/52
Abstract: An on chip leakage-current detection device including a first inverter where the magnitude of delay of the output signal of the first inverter is determined by a leakage current of a target device. The leakage-current detection device further includes: a capacitor that is charged by the output signal of the first inverter; a second inverter coupled to capacitor that switches states when the capacitor is charged to a switching level; an odd number of additional inverters coupled in a sequence with a second-inverter output. The output of the leakage-current detection device has a frequency proportional to the leakage of the target device.
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公开(公告)号：US10680587B2
公开(公告)日：2020-06-09
申请号：US16027762
申请日：2018-07-05
Applicant: STMicroelectronics International N.V.
Inventor： Rajesh Narwal , Pravesh Kumar Saini
IPC: H03K3/0231 , H03K4/502 , H03K5/19 , H03K3/011
Abstract: An RC oscillator generates a periodic trigger signal, and a clock generator generates clock edges in response. A stuck-at-fault detection circuit detects a stuck-at-logic state of the periodic trigger signal and causes the RC oscillator to reset and causes a change in logic state of the periodic trigger signal. The RC oscillator includes first and second comparison circuits, a logic circuit receiving output from the first and second comparison circuits and generating the periodic trigger signal, and a clock generation circuit generating a clock signal therefrom. The stuck-at-fault detection circuit includes a capacitive node, charge circuitry charging the capacitive node based upon the periodic trigger signal, discharge circuitry discharging the capacitive node based upon the periodic trigger signal, and triggering circuitry asserting a reset signal to cause the RC oscillator to reset when the charge on the capacitive node indicates a stuck-at-logic state of the periodic trigger signal.
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