公开(公告)号：US20230261574A1

公开(公告)日：2023-08-17

申请号：US18162870

申请日：2023-02-01

Applicant: STMicroelectronics S.r.I.

Inventor： Laura Capecchi ,  Marcella Carissimi ,  Marco Pasotti ,  Paolo Romele

IPC: H02M3/158 ,  H02M3/07 ,  H02M1/08 ,  H02M1/00

CPC classification number: H02M3/158 ,  H02M3/07 ,  H02M1/082 ,  H02M1/0025

Abstract: In embodiments, a voltage regulator has an input node to receive an input voltage and an output node. The voltage regulator has a charge pump circuit that receives a boosting control signal to boost the input voltage based on the boosting control signal. The voltage regulator further has a feedback regulation circuit configured to receive the output voltage and to provide a first operation control signal and a second operation control signal as a function of the output voltage; a phase control circuit configured to receive the first operation control signal and to provide the boosting control signal as a function of the first operation control signal; and a filter coupled to the output node, configured to receive the second operation control signal and configured to inject to or sink from the output node a charge that is a function of the second operation control signal.

公开(公告)号：US20150228338A1

公开(公告)日：2015-08-13

申请号：US14175843

申请日：2014-02-07

Applicant: STMicroelectronics S.r.I. ,  STMicroelectronics International NV

Inventor： BharathManoj Manda ,  Abhishek Lal ,  Marco Pasotti ,  Marcella Carissimi

IPC: G11C13/00 ,  G06F11/10

CPC classification number: G06F11/1076 ,  G06F11/1048 ,  G11C13/0004 ,  G11C13/0069 ,  G11C13/0097 ,  G11C2029/0411 ,  G11C2211/5646

Abstract: According to embodiments, a phase change memory (PCM) array includes a plurality of memory cells grouped into memory blocks. In the PCM array, each memory cell is a PCM cell. The PCM array also includes a plurality of erase flag cells. Each erase flag cell of the plurality of erase flag cells is associated with a memory block and indicates whether the memory block stores valid data or erased data.

Abstract translation: 根据实施例，相变存储器（PCM）阵列包括分组成存储块的多个存储器单元。 在PCM阵列中，每个存储单元是PCM单元。 PCM阵列还包括多个擦除标志单元。 多个擦除标志单元的每个擦除标志单元与存储块相关联，并且指示存储器块是否存储有效数据或擦除的数据。

公开(公告)号：US10157151B2

公开(公告)日：2018-12-18

申请号：US15297897

申请日：2016-10-19

Applicant: STMicroelectronics S.r.I

Inventor： Emanuela Calvetti ,  Marcella Carissimi

IPC: G06F13/16 ,  G06F13/364 ,  G06F13/42

Abstract: An embodiment method includes storing, in each of a first plurality of memory locations of a memory, an address of another of the first plurality of memory locations, and reading, from a bus signal received at the memory, an address of a first one of the first plurality of memory locations. The method further includes reading data stored in the first one of the first plurality of memory locations, and determining, using the read data, whether a read error has occurred.