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    Non-volatile memory device with clustered memory cells
    3.
    发明授权
    Non-volatile memory device with clustered memory cells 有权
    具有集群存储单元的非易失性存储器件

    公开(公告)号：US09025355B2

    公开(公告)日：2015-05-05

    申请号：US13954908

    申请日：2013-07-30

    Applicant: STMicroelectronics S.r.I. ,  STMicroelectronics PVT Ltd

    Inventor： Fabio De Santis ,  Marco Pasotti ,  Abhishek Lal

    IPC: G11C5/06 ,  G11C5/02 ,  G11C7/18 ,  G11C8/12 ,  G11C16/00 ,  G11C16/24 ,  G11C16/08

    CPC classification number: G11C5/02 ,  G11C5/025 ,  G11C7/18 ,  G11C8/12 ,  G11C16/00 ,  G11C16/08 ,  G11C16/24

    Abstract: An embodiment of a non-volatile memory device includes: a memory array, having a plurality of non-volatile logic memory cells arranged in at least one logic row, the logic row including a first row and a second row sharing a common control line; and a plurality of bit lines. Each logic memory cell has a direct memory cell, for storing a logic value, and a complementary memory cell, for storing a second logic value, which is complementary to the first logic value in the corresponding direct memory cell. The direct memory cell and the complementary memory cell of each logic memory cell are coupled to respective separate bit lines and are placed one in the first row and the other in the second row of the respective logic row.

    Abstract translation: 非易失性存储器件的实施例包括：存储器阵列，其具有布置在至少一个逻辑行中的多个非易失性逻辑存储器单元，所述逻辑行包括共享公共控制线的第一行和第二行; 和多个位线。 每个逻辑存储器单元具有用于存储逻辑值的直接存储单元和用于存储第二逻辑值的互补存储器单元，该第二逻辑值与对应的直接存储器单元中的第一逻辑值互补。 每个逻辑存储单元的直接存储单元和互补存储单元被耦合到相应的单独的位线，并且被放置在相应的逻辑行的第二行中的第一行而另一个中。

    VOLTAGE REGULATOR COMPRISING A CHARGE PUMP CIRCUIT
    4.
    发明公开
    VOLTAGE REGULATOR COMPRISING A CHARGE PUMP CIRCUIT 审中-公开

    公开(公告)号：US20230261574A1

    公开(公告)日：2023-08-17

    申请号：US18162870

    申请日：2023-02-01

    Applicant: STMicroelectronics S.r.I.

    Inventor： Laura Capecchi ,  Marcella Carissimi ,  Marco Pasotti ,  Paolo Romele

    IPC: H02M3/158 ,  H02M3/07 ,  H02M1/08 ,  H02M1/00

    CPC classification number: H02M3/158 ,  H02M3/07 ,  H02M1/082 ,  H02M1/0025

    Abstract: In embodiments, a voltage regulator has an input node to receive an input voltage and an output node. The voltage regulator has a charge pump circuit that receives a boosting control signal to boost the input voltage based on the boosting control signal. The voltage regulator further has a feedback regulation circuit configured to receive the output voltage and to provide a first operation control signal and a second operation control signal as a function of the output voltage; a phase control circuit configured to receive the first operation control signal and to provide the boosting control signal as a function of the first operation control signal; and a filter coupled to the output node, configured to receive the second operation control signal and configured to inject to or sink from the output node a charge that is a function of the second operation control signal.

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