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    Systems and methods for data comparison
    3.
    发明授权
    Systems and methods for data comparison 有权

    公开(公告)号：US12135722B2

    公开(公告)日：2024-11-05

    申请号：US18091852

    申请日：2022-12-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Praveen Krishnamoorthy ,  Changho Choi ,  Andrew Chang

    IPC: G06F16/245

    Abstract: A method includes receiving, at a hardware circuit of a device, a target value corresponding to a target data. The method further includes outputting, from the hardware circuit, a first indicator that source data corresponds to the target value. The method further includes, based on the first indicator, outputting, from software executing at the device, a result indicator that the source data corresponds to the target data.

    SYSTEMS AND METHODS FOR DETECTING INTRA-CHIP COMMUNICATION ERRORS IN A RECONFIGURABLE HARDWARE SYSTEM
    4.
    发明公开
    SYSTEMS AND METHODS FOR DETECTING INTRA-CHIP COMMUNICATION ERRORS IN A RECONFIGURABLE HARDWARE SYSTEM 审中-公开

    公开(公告)号：US20230144843A1

    公开(公告)日：2023-05-11

    申请号：US17716988

    申请日：2022-04-08

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yukui Luo ,  Andrew Chang

    IPC: G06F11/07

    CPC classification number: G06F11/079 ,  G06F11/0745

    Abstract: Systems and methods for error detection for an address channel are disclosed. The method includes generating a token, applying the token to a request at a source, and generating a first result. The request with the first result is transmitted to a destination over the address channel. A determination is made, at the destination, whether an error associated with the request has occurred. The determining whether the error has occurred includes: receiving a received request corresponding to the request over the address channel; receiving the first result with the received request; applying the token to the received request and generating a second result; comparing the first result with the second result; and transmitting a signal in response to the comparing.

    DISAGGREGATED MEMORY SERVER
    7.
    发明申请
    DISAGGREGATED MEMORY SERVER 有权

    公开(公告)号：US20210311646A1

    公开(公告)日：2021-10-07

    申请号：US17026087

    申请日：2020-09-18

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Krishna Teja Malladi ,  Byung Hee Choi ,  Andrew Chang ,  Ehsan M. Najafabadi

    IPC: G06F3/06

    Abstract: A system and method for managing memory resources. In some embodiments, the system includes a first memory server, a second memory server, and a server-linking switch connected to the first memory server and to the second memory server. The first server may include a cache-coherent switch and a first memory module. In some embodiments, the first memory module is connected to the cache-coherent switch, and the cache-coherent switch is connected to the server-linking switch.

    Dedupe DRAM cache
    8.
    发明授权
    Dedupe DRAM cache 有权

    公开(公告)号：US10705969B2

    公开(公告)日：2020-07-07

    申请号：US15934940

    申请日：2018-03-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Mu Tien Chang ,  Andrew Chang ,  Dongyan Jiang ,  Hongzhong Zheng

    IPC: G06F12/08 ,  G06F12/0891 ,  G06F3/06

    Abstract: A dedupable cache is disclosed. The dedupable cache may include cache memory including both a dedupable read cache and a non-dedupable write buffer. The dedupable cache may also include a deduplication engine to manage reads from and writes to the dedupable read cache, and may return a write status signal indicating whether a write to the dedupable read cache was successful or not. The dedupable cache may also include a cache controller, which may include: a cache hit/miss check to determine whether an address in a request may be found in the dedupable read cache; a hit block to manage data accesses when the requested data may be found in the dedupable read cache; a miss block to manage data accesses when the requested data is not found in the dedupable read cache; and a history storage to store information about accesses to the data in the dedupable read cache.

    Systems, methods, and devices for acceleration of merge join operations
    9.
    发明授权
    Systems, methods, and devices for acceleration of merge join operations 有权

    公开(公告)号：US12001427B2

    公开(公告)日：2024-06-04

    申请号：US17174350

    申请日：2021-02-11

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Shiyu Li ,  Yiqun Zhang ,  Joo Hwan Lee ,  Yang Seok Ki ,  Andrew Chang

    IPC: G06F16/2453

    CPC classification number: G06F16/24537 ,  G06F16/24532

    Abstract: A method of processing data may include receiving a stream of first keys associated with first data, receiving a stream of second keys associated with second data, comparing, in parallel, a batch of the first keys and a batch of the second keys, collecting one or more results from the comparing, and gathering one or more results from the collecting. The collecting may include reducing an index matrix and a mask matrix. Gathering one or more results may include storing, in a leftover vector, at least a portion of the one or more results from the collecting. Gathering one or more results further may include combining at least a portion of the leftover vector from a first cycle with at least a portion of the one or more results from the collecting from a second cycle.

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