公开(公告)号：US20230197402A1

公开(公告)日：2023-06-22

申请号：US17891204

申请日：2022-08-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： YUJIN CHO ,  JONGHYUK KANG ,  INHYE PARK ,  SUYOUNG LEE ,  CHUNGSAM JUN ,  HONGCHE NOH ,  JANGHEE LEE

IPC: H01J37/28 ,  H01J37/244 ,  H01J37/26 ,  H01J37/147

CPC classification number: H01J37/28 ,  H01J37/244 ,  H01J37/265 ,  H01J37/1471 ,  H01J2237/2817 ,  H01J2237/0048 ,  H01J2237/24592

Abstract: Disclosed are semiconductor inspection apparatuses and methods. The semiconductor inspection apparatus comprises a stage that supports a semiconductor device, a first column that irradiates a first electron beam toward the semiconductor device on the stage, a second column that irradiates a second electron beam toward the semiconductor device, and a detector that detects a secondary electron generated by the second electron beam. The first column is disposed to make a first angle with a top surface of the semiconductor device. The second column is disposed to make a second angle with the top surface of the semiconductor device. The first angle and the second angle are different from each other.

公开(公告)号：US20240175915A1

公开(公告)日：2024-05-30

申请号：US18203138

申请日：2023-05-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEKYE JEON ,  JINWOO LEE ,  JONGCHEON SUN ,  SUYOUNG LEE ,  HYEONGCHEOL LEE ,  CHUNGSAM JUN

IPC: G01R31/28

CPC classification number: G01R31/2853 ,  G01R31/287

Abstract: In a substrate inspection method, a substrate is provided on a substrate stage, the substrate having internal wires and connection wires, the internal wires respectively provided between stacked insulating layers, the connection wires respectively extending from the internal wires and exposed to an upper surface of the substrate. An electric circuit of the internal wires in the substrate is modeled to generate a circuit model. AC power is applied to the substrate stage to obtain measured capacitance values of the internal wires through currents that are obtained from the connection wires. DC power is applied to the substrate stage to obtain measured resistance values of the internal wires through voltages that are obtained from the connection wires. Impedance values of the internal wires are calculated through the measured capacitance values and the measured resistance values. The impedance values and the circuit model are compared to determine reliability of the substrate.

公开(公告)号：US20230266258A1

公开(公告)日：2023-08-24

申请号：US18113121

申请日：2023-02-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： INHYE PARK ,  SUYOUNG LEE ,  YUJIN CHO ,  JONG CHEON SUN ,  CHUNGSAM JUN

IPC: G01N23/2251

CPC classification number: G01N23/2251 ,  G01N2223/6116 ,  G01N2223/646

Abstract: A method of inspecting a semiconductor device includes charging an inspection region of a semiconductor device using a charging electron beam, and scanning the inspection region using a scanning electron beam. The charging of the inspection region includes dividing the inspection region into a charging region and a non-charging region, and charging the charging region using the charging electron beam. The scanning of the inspection region includes irradiating the scanning electron beam to the inspection region, and detecting secondary electrons emitted from the inspection region by the scanning electron beam.

公开(公告)号：US20160027707A1

公开(公告)日：2016-01-28

申请号：US14794813

申请日：2015-07-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Yoon RYU ,  WOOSEOK KO ,  Souk KIM ,  Yusin YANG ,  SANGKIL LEE ,  CHUNGSAM JUN ,  Kwanwoo RYU

IPC: H01L21/66

CPC classification number: H01L22/12 ,  H01L21/67173 ,  H01L22/20

Abstract: A method includes loading a substrate into a sensing chamber; while the substrate is in the sensing chamber, performing a spectral analysis of the substrate; transferring the substrate between the sensing chamber and a processing chamber coupled to the sensing chamber; processing the substrate in the processing chamber to form at least a first layer and/or pattern on the substrate; and based on at least the spectral analysis, determining whether a parameter resulting from the formation of first layer and/or pattern is satisfied.

Abstract translation: 一种方法包括将衬底加载到感测室中; 同时衬底在感测室中，对衬底进行光谱分析; 在所述感测室和耦合到所述感测室的处理室之间传送所述衬底; 在所述处理室中处理所述衬底以在所述衬底上形成至少第一层和/或图案; 并且至少基于光谱分析，确定是否满足形成第一层和/或图案所引起的参数。