中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

7 records (took 0.013 seconds)

    SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME
    2.
    发明申请
    SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME 有权

    公开(公告)号：US20220416052A1

    公开(公告)日：2022-12-29

    申请号：US17696258

    申请日：2022-03-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sangmin KANG ,  Junghwan KIM

    IPC: H01L29/45 ,  H01L27/11582 ,  H01L27/11556 ,  H01L29/10

    Abstract: A semiconductor device includes a substrate; gate electrodes spaced apart from each other and stacked in a direction, perpendicular to an upper surface of the substrate; first and second horizontal conductive layers sequentially stacked between the substrate and the gate electrodes; and a channel structure passing through the gate electrodes and extending perpendicularly, and including a channel layer contacting the first horizontal conductive layer, wherein the channel layer has a region having a reduced diameter below a first level in which a lower surface of a lowermost gate electrode is located, among the gate electrodes, and the channel structure further includes a metal silicide region located below the first level and in the channel structure to contact the channel layer.

    ELECTRONIC DEVICE INCLUDING SUPPORT STRUCTURE
    5.
    发明公开
    ELECTRONIC DEVICE INCLUDING SUPPORT STRUCTURE 审中-公开

    公开(公告)号：US20230297143A1

    公开(公告)日：2023-09-21

    申请号：US18117581

    申请日：2023-03-06

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Taejeong KIM ,  Byounggyu PARK ,  Kyungtae KIM ,  Moonsoo KIM ,  Garam LEE ,  Junyoung CHOI ,  Jungyup HAN ,  Junghwan KIM

    IPC: G06F1/16 ,  H04M1/02

    CPC classification number: G06F1/1656 ,  G06F1/1624 ,  G06F1/1652 ,  H04M1/0237 ,  H04M1/0268

    Abstract: An electronic device comprises housings including a first housing and a second housing configured to accommodate at least a portion of the first housing and guide sliding of the first housing, a flexible display including a first display area and a second display area extending from the first display area, and a monolithic support structure configured to support at least a portion of the second display area. The support structure includes a plate part and a plurality of bar-shaped parts protruding side by side from the plate part and disposed parallel to the plate part. The plate part and the plurality of bar-shaped parts are formed from a single monolithic structure. Each of the plurality of bar-shaped parts includes a second portion extending from the plate part and a first portion extending from the second portion, and a first width of the first portion is greater than a second width of the second portion. The plate part includes a plurality of openings located between adjacent ones of the bar-shaped parts.

    THREE-DIMENSIONAL SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME
    6.
    发明申请
    THREE-DIMENSIONAL SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME 有权

    公开(公告)号：US20210057445A1

    公开(公告)日：2021-02-25

    申请号：US16910199

    申请日：2020-06-24

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sunggil KIM ,  Sungjin KIM ,  Seulye KIM ,  Junghwan KIM ,  Chanhyoung KIM

    IPC: H01L27/11582 ,  H01L29/10

    Abstract: A three-dimensional semiconductor device including a conductive layer disposed on a substrate and including a first conductivity-type impurity; an insulating base layer disposed on the conductive layer; a stack structure including a lower insulating film disposed on the insulating base layer, and a plurality of gate electrodes and a plurality of mold insulating layers alternately stacked on the lower insulating film, wherein the insulating base layer includes a high dielectric material; a vertical structure including a vertical channel layer penetrating through the stack structure and a vertical insulating layer disposed between the vertical channel layer and the plurality of gate electrodes, the vertical structure having an extended area extending in a width direction in the insulating base layer; and an isolation structure penetrating through the stack structure, the insulating base layer and the conductive layer, and extending in a direction parallel to an upper surface of the substrate, wherein the conductive layer has an extension portion extending along a surface of the vertical channel layer in the extended area of the vertical structure.

    WAFER CHUCK TABLE AND WAFER CHUCK SYSTEM
    7.
    发明公开
    WAFER CHUCK TABLE AND WAFER CHUCK SYSTEM 审中-公开

    公开(公告)号：US20230207369A1

    公开(公告)日：2023-06-29

    申请号：US17893659

    申请日：2022-08-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jonggu LEE ,  Sunghyup KIM ,  Jeongdu KIM ,  Hyeonjin KIM ,  Junghwan KIM

    IPC: H01L21/683 ,  H01L21/687

    CPC classification number: H01L21/6833 ,  H01L21/68742 ,  H01L21/6875

    Abstract: A wafer chuck table includes a center plate having a plurality of first protrusions each having an upper end at least partially defining a first reference plane, segmented plates arranged around the center plate and having a plurality of second protrusions, each having an upper end at least partially defining a second reference plane such that the segmented plates have separate, respective pluralities of second protrusions at least partially defining separate, respective second reference planes, and driving units configured to adjust an inclination angle of the segmented plates with respect to the center plate so that the first reference plane and the separate, respective second reference planes are coplanar.

Patent Agency Ranking