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    Interface circuit and packet transmission method thereof
    1.
    发明授权
    Interface circuit and packet transmission method thereof 有权

    公开(公告)号：US10719472B2

    公开(公告)日：2020-07-21

    申请号：US16216071

    申请日：2018-12-11

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Eunji Lee ,  Junghyo Woo

    IPC: G06F13/40 ,  G06F13/42 ,  G06F12/0866

    Abstract: A packet transmission method includes packaging a plurality of data in the form of a payload; storing information on whether the plurality of data are packaged in a header, the payload or a CRC area including a transmission error check code of the plurality of data; combining the header, the payload, and the CRC area with each other to generate a transaction layer packet; and outputting a packet including the transaction layer packet.

    Embedded memory device and memory controller including the same
    4.
    发明授权
    Embedded memory device and memory controller including the same 有权
    嵌入式存储器件和存储器控制器包括相同的

    公开(公告)号：US09142317B2

    公开(公告)日：2015-09-22

    申请号：US14231856

    申请日：2014-04-01

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Younggeun Lee ,  Youngjin Cho ,  Hyun-Wook Lee ,  Junghyo Woo

    IPC: G11C7/00 ,  G11C17/16 ,  G11C17/00 ,  G11C11/00 ,  G06F12/06 ,  G06F13/16

    CPC classification number: G11C17/16 ,  G06F12/06 ,  G06F13/1668 ,  G06F13/1694 ,  G11C11/005 ,  G11C17/00 ,  G11C29/822 ,  G11C29/846

    Abstract: An embedded memory device includes a mask ROM including a plurality of mask ROM cells and an address decoder configured to decode an address of the plurality of mask ROM cells; and an e-fuse memory configured to replace a part of data stored in the mask ROM with replacement data, the e-fuse memory including, a plurality of e-fuse memory cells configured to store the replacement data, and an e-fuse address selector configured to decode an address of the plurality of e-fuse memory cells and to selectively cause data of one or more of the plurality of e-fuse memory cells to be output based on the decoding result.

    Abstract translation: 一种嵌入式存储器件包括：掩模ROM，包括多个掩模ROM单元;以及地址解码器，被配置为对多个掩模ROM单元的地址进行解码; 以及电子熔丝存储器，其被配置为用替换数据替换存储在掩模ROM中的一部分数据，所述电子熔丝存储器包括被配置为存储替换数据的多个电子熔丝存储器单元和电子熔丝地址 所述选择器被配置为解码所述多个电子熔丝存储单元的地址，并且基于所述解码结果选择性地引起所述多个电子熔丝存储器单元中的一个或多个的数据的输出。

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