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公开(公告)号：US20210065803A1
公开(公告)日：2021-03-04
申请号：US16834025
申请日：2020-03-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Junha LEE , Seonkyoo LEE , Jeongdon IHM , Byunghoon JEONG
IPC: G11C16/06 , H01L25/065 , H01L23/66 , H01L25/18
Abstract: A multi-chip package with reduced calibration time and an impedance control (ZQ) calibration method thereof are provided. A master chip of the multi-chip package performs a first ZQ calibration operation by using a ZQ resistor, and then, the other slave chips simultaneously perform second ZQ calibration operations with respect to data input/output (DQ) pads of the slave chips by using a termination resistance value of a DQ pad of the master chip on the basis of a one-to-one correspondence relationship with the DQ pad of the master chip. The multi-chip package completes ZQ calibration by performing two ZQ calibration operations, thereby decreasing a ZQ calibration time.
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Patent Agency Ranking
公开(公告)号：US20230138561A1
公开(公告)日：2023-05-04
申请号：US17938214
申请日：2022-10-05
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dongho SHIN , Jungjune PARK , Kyoungtae KANG , Chiweon YOON , Junha LEE , Byunghoon JEONG
Abstract: An apparatus and method for ZQ calibration, including determining a strong driver circuit and a weak driver circuit, which are related to an input/output (I/O) circuit connected to a signal pin, at power-up of the I/O circuit; providing a ZQ calibration code related to a sweep code to one from among the strong driver circuit and the weak driver circuit according to ZQ calibration conditions; and providing a ZQ calibration code related to a fixed code to an unselected circuit, thereby adjusting a termination resistance of the signal pin.
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公开(公告)号：US20210366546A1
公开(公告)日：2021-11-25
申请号：US17393784
申请日：2021-08-04
Applicant: Samsung Electronics Co., Ltd.
Inventor： Junha LEE , Seonkyoo LEE , Jeongdon IHM , Byunghoon JEONG
IPC: G11C16/06 , H01L23/66 , H01L25/065 , H01L25/18
Abstract: A multi-chip package with reduced calibration time and an impedance control (ZQ) calibration method thereof are provided. A master chip of the multi-chip package performs a first ZQ calibration operation by using a ZQ resistor, and then, the other slave chips simultaneously perform second ZQ calibration operations with respect to data input/output (DQ) pads of the slave chips by using a termination resistance value of a DQ pad of the master chip on the basis of a one-to-one correspondence relationship with the DQ pad of the master chip. The multi-chip package completes ZQ calibration by performing two ZQ calibration operations, thereby decreasing a ZQ calibration time.
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公开(公告)号：US20210226613A1
公开(公告)日：2021-07-22
申请号：US17222033
申请日：2021-04-05
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dongho SHIN , Kyungtae KANG , Junha LEE , Tongsung KIM , Jangwoo LEE , Jeongdon IHM , Byunghoon JEONG
Abstract: A method of operating a system including a parameter monitoring circuit and a host, includes generating a first parameter applying a first code to a current parameter, wherein a first offset is applied to the first code; generating a first comparison result by comparing the first parameter with a reference parameter value; generating a second parameter applying a second code to the current parameter, wherein a second offset is applied to the second code; generating a second comparison result by comparing the second parameter with the reference parameter value; detecting an error in the current parameter, based on the first comparison result and the second comparison result; and providing a signal based on the error to the host.
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公开(公告)号：US20210075405A1
公开(公告)日：2021-03-11
申请号：US16861903
申请日：2020-04-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dongho SHIN , Kyungtae KANG , Junha LEE , Tongsung KIM , Jangwoo LEE , Jeongdon IHM , Byunghoon JEONG
Abstract: A parameter monitoring circuit includes a code generation circuit configured to generate a first code, to which a first offset is applied, and a second code, to which a second offset is applied; a parameter adjustment circuit configured to generate a first parameter and a second parameter by respectively applying the first code and the second code to a current parameter; a comparator circuit configured to generate a first comparison result and a second comparison result, the first comparison result indicating a comparison result between the first parameter and a reference parameter value, and the second comparison result indicating a comparison result between the second parameter and the reference parameter value; and a parameter error detection circuit configured to detect an error in the current parameter, based on the first comparison result and the second comparison result.
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公开(公告)号：US20210065753A1
公开(公告)日：2021-03-04
申请号：US17012845
申请日：2020-09-04
Applicant: Samsung Electronics Co., Ltd.
Inventor： Junha LEE , Seonkyoo LEE , Jeongdon IHM , Byunghoon JEONG
IPC: G11C7/10 , H01L25/065 , H01L25/18 , H01L23/00
Abstract: A multi-chip package with reduced calibration time and an impedance control (ZQ) calibration method thereof are provided. A master chip of the multi-chip package performs a first ZQ calibration operation by using a ZQ resistor, and then, the other slave chips simultaneously perform second ZQ calibration operations with respect to data input/output (DQ) pads of the slave chips by using a termination resistance value of a DQ pad of the master chip on the basis of a one-to-one correspondence relationship with the DQ pad of the master chip. The multi-chip package completes ZQ calibration by performing two ZQ calibration operations, thereby decreasing a ZQ calibration time.
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