公开(公告)号：US20150228786A1

公开(公告)日：2015-08-13

申请号：US14542867

申请日：2014-11-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wook-Yeol Yi ,  Ki-Hong Nam ,  Dong-Chan Kim ,  Hee-Don Hwang ,  Young-Min Kim ,  Duk-Young Jang

IPC: H01L29/78 ,  H01L29/423

CPC classification number: H01L29/7843 ,  H01L21/76224 ,  H01L29/4236 ,  H01L29/66621 ,  H01L29/78 ,  H01L29/7827 ,  H01L29/7846

Abstract: A semiconductor device includes a semiconductor substrate having an active region. A gate trench is disposed to cross the active region. First and second source/drain regions are disposed in the active region at both sides of the gate trench. A gate electrode is disposed in the gate trench. A gate dielectric layer is disposed between the gate electrode and the active region. A stress pattern is disposed on the gate electrode and in the gate trench. The stress pattern has a lower residual stress than silicon nitride.

Abstract translation: 半导体器件包括具有有源区的半导体衬底。 栅极沟槽被布置成越过有源区域。 第一和第二源极/漏极区域设置在栅极沟槽的两侧的有源区域中。 栅电极设置在栅极沟槽中。 栅电介质层设置在栅电极和有源区之间。 应力图案设置在栅极电极和栅极沟槽中。 应力模式比氮化硅具有更低的残余应力。

公开(公告)号：US09054037B2

公开(公告)日：2015-06-09

申请号：US14060806

申请日：2013-10-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Chan Kim ,  Tai-Su Park ,  Ju-Eun Kim ,  Ki-Hong Nam

IPC: H01L21/336 ,  H01L21/28 ,  H01L29/51 ,  H01L21/02 ,  H01L27/108

CPC classification number: H01L21/28185 ,  H01L21/02164 ,  H01L21/0228 ,  H01L21/28194 ,  H01L27/10814 ,  H01L27/10876 ,  H01L27/10888 ,  H01L29/513 ,  H01L29/517

Abstract: A method of fabricating a semiconductor device includes forming a trench in a substrate, forming a pre-gate insulating film along side surfaces and a bottom surface of the trench, and oxidizing the pre-gate insulating film through a densification process.

Abstract translation: 制造半导体器件的方法包括在衬底中形成沟槽，沿着沟槽的侧表面和底表面形成预栅绝缘膜，并通过致密化过程来氧化预栅绝缘膜。