公开(公告)号：US20240405995A1

公开(公告)日：2024-12-05

申请号：US18598325

申请日：2024-03-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inmyung CHOI ,  Minho KIM ,  Moonsoo CHANG ,  Minsoo SHIN ,  Sohyeon JEON ,  Byoungil CHOI

IPC: H04L9/32 ,  G06V10/44 ,  H04L9/08

Abstract: An electronic device is provided. The electronic device includes memory storing instructions, a camera, a communication circuit, and a processor. The instructions, when executed by the processor, cause the electronic device to obtain an image including a body portion of a user through the camera based on execution of a software application, obtain a plurality of feature values for the body portion identified based on the image, generate a first value hashed based on first feature values representing at least one part of the body portion from among the plurality of feature values, generate a second value hashed based on second feature values representing at least another part of the body portion from among the plurality of feature values, and transmit, through the communication circuit, the first value and the second value to an external electronic device providing the software application.

公开(公告)号：US20240381641A1

公开(公告)日：2024-11-14

申请号：US18435342

申请日：2024-02-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyungeun PARK ,  Solmi KWAK ,  Jinhyuk KIM ,  Hyeongjin KIM ,  Jeongyong SUNG ,  Minsoo SHIN ,  Seungjun SHIN ,  Joongshik SHIN ,  Sunghee CHUNG ,  Jeehoon HAN

IPC: H10B43/27 ,  H10B41/27 ,  H10B41/40 ,  H10B43/40

Abstract: A vertical memory device may include a common source plate on a substrate including a first region and a second region; gate pattern structures on the common source plate and extending from the first region to the second region, wherein the gate pattern structures include gate patterns and first insulation layers, and wherein the adjacent gate pattern structures are spaced apart from each other; first separation patterns filling first openings between the adjacent gate pattern structures on the first region; second separation patterns filling second openings between the adjacent gate pattern structures on the second region, wherein at least one of the second separation patterns is connected to at least one of the first separation patterns, and wherein the second separation pattern has a shape different from a shape of the first separation pattern; and channel structures passing through the gate pattern structures on the first region.

公开(公告)号：US20230025248A1

公开(公告)日：2023-01-26

申请号：US17861573

申请日：2022-07-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoonhwan SON ,  Minsoo SHIN ,  Joongshik SHIN

IPC: H01L27/11582 ,  H01L27/11573 ,  G11C16/04

Abstract: A three-dimensional semiconductor memory device may include a substrate, a stack structure including interlayer dielectric layers and gate electrodes alternately and repeatedly stacked on the substrate and including a first stack structure on the substrate and a second stack structure on the first stack structure, a seed layer interposed between the first and second stack structures and extended in a horizontal direction, vertical channel structures that penetrate the stack structure and are in contact with the substrate, and a first contact plug that penetrates the stack structure and is in contact with one of the gate electrodes. The seed layer may include first and second seed patterns enclosing the vertical channel structures and the first contact plug, and the first and second seed patterns may be spaced apart from each other in the horizontal direction.

公开(公告)号：US20250087018A1

公开(公告)日：2025-03-13

申请号：US18802774

申请日：2024-08-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heejun YOU ,  Minsoo SHIN ,  Wonjung CHOI

IPC: G06V40/16 ,  G06V10/141 ,  G06V10/20 ,  H04N23/611 ,  H04N23/80

Abstract: An electronic device may comprise: an image sensor, an image pre-processor comprising circuitry, memory storing instructions, and at least one processor comprising processing circuitry. The instructions, when executed by at least one processor, individually and/or collectively, may cause the electronic device to: obtain raw data including biometric data using the image sensor. The instructions, when executed by at least one processor, individually and/or collectively, may cause the electronic device to store, in a first buffer, the raw data as first image data. The instructions, when executed by at least one processor, individually and/or collectively, may cause the electronic device to store, in a second buffer, second image data generated by applying a change operation to the raw data using the image pre-processor. The instructions, when executed by at least one processor, individually and/or collectively, may cause the electronic device to forward the first image data stored in the first buffer to a first application included in a secure area and apply a first algorithm for biometric authentication to the first image data. The instructions, when executed by at least one processor, individually and/or collectively, may cause the electronic device to forward the second image data stored in the second buffer to a second application included in a non-secure area and apply a second algorithm different from the first algorithm to the second image data. Other various embodiments are also available.

公开(公告)号：US20240130123A1

公开(公告)日：2024-04-18

申请号：US18208459

申请日：2023-06-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yejin PARK ,  Seung Yoon KIM ,  Heesuk KIM ,  Hyeongjin KIM ,  Sehee JANG ,  Minsoo SHIN ,  Seungjun SHIN ,  Sanghun CHUN ,  Jeehoon HAN ,  Jae-Hwang SIM ,  Jongseon AHN

IPC: H10B43/27 ,  H01L23/522 ,  H01L23/528 ,  H01L25/065 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/10 ,  H10B43/35 ,  H10B80/00

CPC classification number: H10B43/27 ,  H01L23/5226 ,  H01L23/5283 ,  H01L25/0652 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/10 ,  H10B43/35 ,  H10B80/00 ,  H01L2225/06541

Abstract: Disclosed are semiconductor devices, electronic systems including the same, and methods of fabricating the same. The semiconductor device comprises a first gate stack structure including a first dielectric pattern and a first conductive pattern that are alternately stacked with each other, a memory channel structure including a first memory portion that penetrates the first gate stack structure, a through contact including a first through portion at a level the same as a level of the first memory portion, and a connection contact including a first connection portion at a level the same as the level of the first memory portion and the level of the first through portion. A minimum width of the first memory portion is less than a minimum width of the first through portion and a minimum width of the first connection portion.

公开(公告)号：US20220058251A1

公开(公告)日：2022-02-24

申请号：US17516309

申请日：2021-11-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minsoo SHIN ,  Jiyoung PARK ,  Heejun YOU ,  Moonsoo CHANG ,  Yongha CHOI ,  Wonjung CHOI ,  Jihee HONG ,  Donghyun YEOM ,  Dasom LEE

IPC: G06F21/32 ,  G06F21/45

Abstract: An electronic device according to various embodiments of the present disclosure includes: at least one sensor; a communication circuit; at least one processor operably coupled with the at least one sensor and the communication circuit; and at least one memory operably coupled with the at least one processor, wherein the memory may store instructions which, when executed, cause the processor to: receive a request for authenticating a user of the electronic device using a designated authentication method; identify whether a device selected as a reference device is a first device among the first device and a second device which are included in the at least one sensor and the communication circuit, and are capable of generating authentication data required for using the designated authentication method to authenticate the user; generate data, when first authentication data for authenticating the user is acquired from the first device, indicating a first time point at which the processor acquired the first authentication data; generate data, when second authentication data for authenticating the user is acquired from the second device, indicating a second time point at which the processor acquired the second authentication data; confirm, based on the first data indicating the first time point and the second data indicating the second time point, whether the second time point is within a threshold time range based on the first time point; and authenticate the user using the first authentication data and the second authentication data based on whether the second time point is within the threshold time range based on the first time point.