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公开(公告)号:US20220173053A1
公开(公告)日:2022-06-02
申请号:US17352503
申请日:2021-06-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: NOH YEONG PARK , BEOMJIN PARK , DONG IL BAE , Sangwon BAEK , HYUN-SEUNG SONG
IPC: H01L23/00 , H01L27/092 , H01L29/06 , H01L29/423 , H01L29/786 , H01L21/02 , H01L21/8238 , H01L29/66
Abstract: A semiconductor device may include a substrate including a first region and a second region and a first active pattern on the first region. The first active pattern may include a pair of first source/drain patterns and a first channel pattern therebetween, and the first channel pattern may include a plurality of first semiconductor patterns stacked on the substrate. The semiconductor device may further include a first gate electrode, which is provided on the first channel patterns, and a supporting pattern, which is provided on side surfaces of the plurality of first semiconductor patterns to connect the side surfaces of the plurality of first semiconductor patterns to each other.
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公开(公告)号:US20240006522A1
公开(公告)日:2024-01-04
申请号:US18204449
申请日:2023-06-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Junbeom PARK , Sangwon BAEK , Yunsuk NAM
IPC: H01L29/775 , H01L29/06 , H01L29/423 , H01L29/417 , H01L29/66
CPC classification number: H01L29/775 , H01L29/0673 , H01L29/42392 , H01L29/41733 , H01L29/66545 , H01L29/66553 , H01L29/66439
Abstract: A semiconductor device includes an active region extending in a first direction on a substrate; a plurality of channel layers on the active region and spaced apart from each other in a vertical direction that is perpendicular to the first direction; a gate structure on the substrate, the gate structure intersecting the active region and the plurality of channel layers, extending in a second direction crossing the first direction, and respectively surrounding the plurality of channel layers; inner spacer layers on both sides of the gate structure in the first direction, and on respective lower surfaces of the plurality of channel layers; a protective layer in contact with the inner spacer layers, the plurality of channel layers, and the active region; and a source/drain region on the active region, on at least one side of the gate structure, and in contact with the inner spacer layers.
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公开(公告)号:US20220302316A1
公开(公告)日:2022-09-22
申请号:US17836416
申请日:2022-06-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Woocheol SHIN , Sunggi HUR , Sangwon BAEK , Junghan LEE
IPC: H01L29/786 , H01L29/06 , H01L29/423 , H01L29/66 , H01L21/02
Abstract: A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are stacked in a vertical direction. Each channel extends in a first direction. The gate structure extends in a second direction. The gate structure covers the channels. The source/drain layer is connected to each of opposite sidewalls in the first direction of the channels on the substrate, and includes a doped semiconductor material. The source/drain layer includes first and second epitaxial layers having first and second impurity concentrations, respectively. The first epitaxial layer covers a lower surface and opposite sidewalls in the first direction of the second epitaxial layer. A portion of each of opposite sidewalls in the first direction of the gate structure protrudes in the first direction from opposite sidewalls in the first direction of the channels to partially penetrate through the first epitaxial layer but not to contact the second epitaxial layer.
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公开(公告)号:US20210257499A1
公开(公告)日:2021-08-19
申请号:US17034421
申请日:2020-09-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Woocheol SHIN , Sunggi HUR , Sangwon BAEK , Junghan LEE
IPC: H01L29/786 , H01L29/06 , H01L29/423 , H01L21/02 , H01L29/66
Abstract: A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are stacked in a vertical direction. Each channel extends in a first direction. The gate structure extends in a second direction. The gate structure covers the channels. The source/drain layer is connected to each of opposite sidewalls in the first direction of the channels on the substrate, and includes a doped semiconductor material. The source/drain layer includes first and second epitaxial layers having first and second impurity concentrations, respectively. The first epitaxial layer covers a lower surface and opposite sidewalls in the first direction of the second epitaxial layer. A portion of each of opposite sidewalls in the first direction of the gate structure protrudes in the first direction from opposite sidewalls in the first direction of the channels to partially penetrate through the first epitaxial layer but not to contact the second epitaxial layer.
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公开(公告)号:US20240234343A1
公开(公告)日:2024-07-11
申请号:US18612304
申请日:2024-03-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: NOH YEONG PARK , BEOMJIN PARK , DONG IL BAE , Sangwon BAEK , HYUN-SEUNG SONG
IPC: H01L23/00 , H01L21/02 , H01L21/8238 , H01L27/092 , H01L29/06 , H01L29/423 , H01L29/66 , H01L29/786
CPC classification number: H01L23/562 , H01L21/0259 , H01L21/823807 , H01L21/823814 , H01L27/092 , H01L29/0665 , H01L29/42392 , H01L29/66545 , H01L29/66742 , H01L29/78618 , H01L29/78696
Abstract: A semiconductor device may include a substrate including a first region and a second region and a first active pattern on the first region. The first active pattern may include a pair of first source/drain patterns and a first channel pattern therebetween, and the first channel pattern may include a plurality of first semiconductor patterns stacked on the substrate. The semiconductor device may further include a first gate electrode, which is provided on the first channel patterns, and a supporting pattern, which is provided on side surfaces of the plurality of first semiconductor patterns to connect the side surfaces of the plurality of first semiconductor patterns to each other.
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公开(公告)号:US20240213371A1
公开(公告)日:2024-06-27
申请号:US18597440
申请日:2024-03-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Woocheol SHIN , Sunggi HUR , Sangwon BAEK , Junghan LEE
IPC: H01L29/786 , H01L21/02 , H01L29/06 , H01L29/423 , H01L29/66
CPC classification number: H01L29/78618 , H01L21/02236 , H01L21/02532 , H01L21/02603 , H01L29/0673 , H01L29/42392 , H01L29/66545 , H01L29/66636 , H01L29/66742 , H01L29/78696
Abstract: A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are stacked in a vertical direction. Each channel extends in a first direction. The gate structure extends in a second direction. The gate structure covers the channels. The source/drain layer is connected to each of opposite sidewalls in the first direction of the channels on the substrate, and includes a doped semiconductor material. The source/drain layer includes first and second epitaxial layers having first and second impurity concentrations, respectively. The first epitaxial layer covers a lower surface and opposite sidewalls in the first direction of the second epitaxial layer. A portion of each of opposite sidewalls in the first direction of the gate structure protrudes in the first direction from opposite sidewalls in the first direction of the channels to partially penetrate through the first epitaxial layer but not to contact the second epitaxial layer.
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