公开(公告)号：US10818727B2

公开(公告)日：2020-10-27

申请号：US16161370

申请日：2018-10-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myoungsu Son ,  Seung Pil Ko ,  Jung Hyuk Lee ,  Shinhee Han ,  Gwan-Hyeob Koh ,  Yoonjong Song

IPC: H01L27/22 ,  H01L43/02 ,  H01L43/12 ,  H01L43/08 ,  H01L23/522

Abstract: A semiconductor device includes a gate structure on a substrate, source and drain contacts respectively on opposite sides of the gate structure and connected to the substrate, a magnetic tunnel junction connected to the drain contact, a first conductive line connected to the source contact, and a second conductive line connected to the first conductive line through a first via contact. The second conductive line is distal to the substrate in relation to the first conductive line. The first and second conductive lines extend in parallel along a first direction. The first and second conductive lines have widths in a second direction intersecting the first direction. The widths of the first and second conductive lines are the same. The first via contact is aligned with the source contact along a third direction perpendicular to a top surface of the substrate.

公开(公告)号：US10418548B2

公开(公告)日：2019-09-17

申请号：US16018700

申请日：2018-06-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Shinhee Han ,  Kiseok Suh ,  KyungTae Nam ,  Woojin Kim ,  Kwangil Shin ,  Minkyoung Joo ,  Gwanhyeob Koh

IPC: H01L43/12 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L27/22 ,  G11C11/16

Abstract: A method of fabricating a magnetic memory device includes forming an interlayered insulating layer on a substrate, forming a landing pad to pass through the interlayered insulating layer, forming a protection insulating layer on the interlayered insulating layer to cover a top surface of the landing pad, forming a bottom electrode to pass through the protection insulating layer and through the interlayered insulating layer, forming a magnetic tunnel junction layer on the protection insulating layer; and patterning the magnetic tunnel junction layer to form a magnetic tunnel junction pattern on the bottom electrode.

公开(公告)号：US09865800B2

公开(公告)日：2018-01-09

申请号：US15404325

申请日：2017-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Shinhee Han ,  Kilho Lee ,  Yoonjong Song

IPC: H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  G11C11/16

CPC classification number: H01L43/02 ,  G11C11/161 ,  H01L27/222 ,  H01L27/224 ,  H01L27/226 ,  H01L43/08 ,  H01L43/12

Abstract: Magnetic memory devices are provided. A magnetic memory device includes a Magnetic Tunnel Junction (MTJ) structure on a contact. Moreover, the magnetic memory device includes an insulating structure and an electrode between the MTJ structure and the contact. In some embodiments, a first contact area of the electrode with the MTJ structure is smaller than a second contact area of the insulating structure with the MTJ structure.

公开(公告)号：US10032981B2

公开(公告)日：2018-07-24

申请号：US15244344

申请日：2016-08-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Shinhee Han ,  Kiseok Suh ,  KyungTae Nam ,  Woojin Kim ,  Kwangil Shin ,  Minkyoung Joo ,  Gwanhyeob Koh

IPC: H01L21/00 ,  H01L43/12 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L27/22 ,  G11C11/16

Abstract: A method of fabricating a magnetic memory device includes forming an interlayered insulating layer on a substrate, forming a landing pad to pass through the interlayered insulating layer, forming a protection insulating layer on the interlayered insulating layer to cover a top surface of the landing pad, forming a bottom electrode to pass through the protection insulating layer and through the interlayered insulating layer, forming a magnetic tunnel junction layer on the protection insulating layer; and patterning the magnetic tunnel junction layer to form a magnetic tunnel junction pattern on the bottom electrode.

公开(公告)号：US11271038B2

公开(公告)日：2022-03-08

申请号：US17027980

申请日：2020-09-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myoungsu Son ,  Seung Pil Ko ,  Jung Hyuk Lee ,  Shinhee Han ,  Gwan-Hyeob Koh ,  Yoonjong Song

IPC: H01L27/22 ,  H01L43/02 ,  H01L43/12 ,  H01L43/08 ,  H01L23/522

Abstract: A semiconductor device includes a gate structure on a substrate, source and drain contacts respectively on opposite sides of the gate structure and connected to the substrate, a magnetic tunnel junction connected to the drain contact, a first conductive line connected to the source contact, and a second conductive line connected to the first conductive line through a first via contact. The second conductive line is distal to the substrate in relation to the first conductive line. The first and second conductive lines extend in parallel along a first direction. The first and second conductive lines have widths in a second direction intersecting the first direction. The widths of the first and second conductive lines are the same. The first via contact is aligned with the source contact along a third direction perpendicular to a top surface of the substrate.