中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

10 records (took 0.013 seconds)

    Semiconductor data storage devices and methods of fabricating the same
    2.
    发明授权
    Semiconductor data storage devices and methods of fabricating the same 有权

    公开(公告)号：US11690231B2

    公开(公告)日：2023-06-27

    申请号：US17019641

    申请日：2020-09-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seung Pil Ko ,  Yongjae Kim

    IPC: H10N50/80 ,  H10B61/00 ,  H10N50/01

    CPC classification number: H10B61/22 ,  H10N50/01 ,  H10N50/80

    Abstract: A method of fabricating a semiconductor device including providing a substrate; forming first and second lower conductive patterns, the and second lower conductive patterns being buried in an interlayer dielectric layer; forming a capping layer on the interlayer dielectric layer and a dummy layer on the capping layer; etching an exposed upper portion of the first lower conductive pattern to form a trench; forming a metal layer that covers the interlayer dielectric layer and the dummy layer such that the metal layer fills the trench; forming a magnetic tunnel junction layer on the metal layer; performing a patterning process to form a memory cell; and forming a first protective layer that covers a lateral surface of the memory cell, wherein, in the patterning process, the metal layer on the top surface of the interlayer dielectric layer is etched to form a first bottom electrode in the trench.

    Semiconductor devices
    3.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US10818727B2

    公开(公告)日：2020-10-27

    申请号：US16161370

    申请日：2018-10-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Myoungsu Son ,  Seung Pil Ko ,  Jung Hyuk Lee ,  Shinhee Han ,  Gwan-Hyeob Koh ,  Yoonjong Song

    IPC: H01L27/22 ,  H01L43/02 ,  H01L43/12 ,  H01L43/08 ,  H01L23/522

    Abstract: A semiconductor device includes a gate structure on a substrate, source and drain contacts respectively on opposite sides of the gate structure and connected to the substrate, a magnetic tunnel junction connected to the drain contact, a first conductive line connected to the source contact, and a second conductive line connected to the first conductive line through a first via contact. The second conductive line is distal to the substrate in relation to the first conductive line. The first and second conductive lines extend in parallel along a first direction. The first and second conductive lines have widths in a second direction intersecting the first direction. The widths of the first and second conductive lines are the same. The first via contact is aligned with the source contact along a third direction perpendicular to a top surface of the substrate.

    Semiconductor device and method of fabricating the same
    4.
    发明授权
    Semiconductor device and method of fabricating the same 有权

    公开(公告)号：US12089420B2

    公开(公告)日：2024-09-10

    申请号：US18312977

    申请日：2023-05-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seung Pil Ko ,  Yongjae Kim

    IPC: H10B61/00 ,  H10N50/01 ,  H10N50/80

    CPC classification number: H10B61/22 ,  H10N50/01 ,  H10N50/80

    Abstract: A method of fabricating a semiconductor device including providing a substrate; forming first and second lower conductive patterns, the and second lower conductive patterns being buried in an interlayer dielectric layer; forming a capping layer on the interlayer dielectric layer and a dummy layer on the capping layer; etching an exposed upper portion of the first lower conductive pattern to form a trench; forming a metal layer that covers the interlayer dielectric layer and the dummy layer such that the metal layer fills the trench; forming a magnetic tunnel junction layer on the metal layer; performing a patterning process to form a memory cell; and forming a first protective layer that covers a lateral surface of the memory cell, wherein, in the patterning process, the metal layer on the top surface of the interlayer dielectric layer is etched to form a first bottom electrode in the trench.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    6.
    发明公开
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开

    公开(公告)号：US20230309322A1

    公开(公告)日：2023-09-28

    申请号：US18312977

    申请日：2023-05-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seung Pil Ko ,  Yongjae Kim

    IPC: H10B61/00 ,  H10N50/01 ,  H10N50/80

    CPC classification number: H10B61/22 ,  H10N50/01 ,  H10N50/80

    Abstract: A method of fabricating a semiconductor device including providing a substrate; forming first and second lower conductive patterns, the and second lower conductive patterns being buried in an interlayer dielectric layer; forming a capping layer on the interlayer dielectric layer and a dummy layer on the capping layer; etching an exposed upper portion of the first lower conductive pattern to form a trench; forming a metal layer that covers the interlayer dielectric layer and the dummy layer such that the metal layer fills the trench; forming a magnetic tunnel junction layer on the metal layer; performing a patterning process to form a memory cell; and forming a first protective layer that covers a lateral surface of the memory cell, wherein, in the patterning process, the metal layer on the top surface of the interlayer dielectric layer is etched to form a first bottom electrode in the trench.

    Method of fabricating semiconductor device
    7.
    发明授权
    Method of fabricating semiconductor device 有权

    公开(公告)号：US10573806B1

    公开(公告)日：2020-02-25

    申请号：US16392046

    申请日：2019-04-23

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kyungtae Nam ,  Seung Pil Ko ,  Woojin Kim ,  Hyunchul Shin ,  Youngsoo Choi

    IPC: H01L43/12 ,  H01L43/08 ,  H01L27/22 ,  G11C11/16 ,  H01L43/02

    Abstract: A method of fabricating a semiconductor device includes forming a magnetic tunnel junction layer including a first magnetic layer, a second magnetic layer, and a tunnel barrier layer interposed between the first and second magnetic layers, patterning the magnetic tunnel junction layer to form a magnetic tunnel junction pattern, forming an insulating layer to cover the magnetic tunnel junction pattern, and performing a thermal treatment process to crystallize at least a portion of the first and second magnetic layers. The thermal treatment process may include performing a first thermal treatment process at a first temperature, after the forming of the magnetic tunnel junction layer, and performing a second thermal treatment process at a second temperature, which is higher than or equal to the first temperature, after the forming of the insulating layer.

    MAGNETIC MEMORY DEVICE AND ELECTRONIC DEVICE COMPRISING THE SAME
    8.
    发明公开
    MAGNETIC MEMORY DEVICE AND ELECTRONIC DEVICE COMPRISING THE SAME 审中-公开

    公开(公告)号：US20230371276A1

    公开(公告)日：2023-11-16

    申请号：US18156570

    申请日：2023-01-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Geon Hee Bae ,  Seung Pil Ko ,  Yoon Jong Song ,  Kil Ho Lee

    IPC: H10B61/00

    CPC classification number: H10B61/00 ,  G11C11/1673

    Abstract: A magnetic memory device includes first and second upper insulating layers and a first mold layer sequentially stacked on a first substrate region; a first primary and first secondary wiring structure spaced apart in a first direction in the first upper insulating layer; a second wiring structure on the first primary wiring structure and a reference wiring structure on the first secondary wiring structure, in the second upper insulating layer; a first structure on the second wiring structure; a second structure on the reference wiring structure; a lower electrode contact between the second wiring structure and the first structure, and not between the reference wiring structure and the second structure, in the first mold layer; a bit line structure on the first structure; and a reference bit line structure on the second structure. The first and second structure include a lower electrode, MTJ structure, intermediate electrode, and upper electrode.

    Semiconductor devices
    10.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US11271038B2

    公开(公告)日：2022-03-08

    申请号：US17027980

    申请日：2020-09-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Myoungsu Son ,  Seung Pil Ko ,  Jung Hyuk Lee ,  Shinhee Han ,  Gwan-Hyeob Koh ,  Yoonjong Song

    IPC: H01L27/22 ,  H01L43/02 ,  H01L43/12 ,  H01L43/08 ,  H01L23/522

    Abstract: A semiconductor device includes a gate structure on a substrate, source and drain contacts respectively on opposite sides of the gate structure and connected to the substrate, a magnetic tunnel junction connected to the drain contact, a first conductive line connected to the source contact, and a second conductive line connected to the first conductive line through a first via contact. The second conductive line is distal to the substrate in relation to the first conductive line. The first and second conductive lines extend in parallel along a first direction. The first and second conductive lines have widths in a second direction intersecting the first direction. The widths of the first and second conductive lines are the same. The first via contact is aligned with the source contact along a third direction perpendicular to a top surface of the substrate.

Patent Agency Ranking