公开(公告)号：US20190139813A1

公开(公告)日：2019-05-09

申请号：US16242483

申请日：2019-01-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Shin JANG ,  Woo-Kyung YOU ,  Kyu-Hee HAN ,  Jong-Min BAEK ,  Viet Ha NGUYEN ,  Byung-Hee KIM

IPC: H01L21/768 ,  H01L23/528 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/7682 ,  H01L21/76816 ,  H01L21/76826 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L23/53295

Abstract: A semiconductor device includes a first insulating interlayer on a first region of a substrate and a second insulating interlayer on a second region of the substrate, a plurality of first wiring structures on the first insulating interlayer, the first wiring structures being spaced apart from each other, a plurality of second wiring structures filling a plurality of trenches on the second insulating interlayer, respectively, an insulation capping structure selectively on a surface of the first insulating interlayer between the first wiring structures and on a sidewall and an upper surface of each of the first wiring structures, the insulation capping structure including an insulating material, a third insulating interlayer on the first and second wiring structures, and an air gap among the first wiring structures under the third insulating interlayer.

公开(公告)号：US20200251376A1

公开(公告)日：2020-08-06

申请号：US16854979

申请日：2020-04-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyu Hee HAN ,  Jong Min BAEK ,  Viet Ha NGUYEN ,  Woo Kyung YOU ,  Sang Shin JANG ,  Byung Hee KIM

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L23/528 ,  H01L21/311

Abstract: A semiconductor device includes a first interlayer dielectric film on a substrate, first and second wires respectively extending in a first direction within the first interlayer dielectric film, the first and second wires being adjacent to each other in a second direction different from the first direction, a hard mask pattern on the first interlayer dielectric film, the hard mask pattern including an opening, and an air gap within the first interlayer dielectric film, the air gap including a first portion overlapping vertically with the opening and a second portion not overlapping with the opening in the first direction.

公开(公告)号：US20180130697A1

公开(公告)日：2018-05-10

申请号：US15616334

申请日：2017-06-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Shin JANG ,  Woo-Kyung YOU ,  Kyu-Hee HAN ,  Jong-Min BAEK ,  Viet Ha NGUYEN ,  Byung-Hee KIM

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532

CPC classification number: H01L21/7682 ,  H01L21/76816 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L23/53295

Abstract: A semiconductor device includes a first insulating interlayer on a first region of a substrate and a second insulating interlayer on a second region of the substrate, a plurality of first wiring structures on the first insulating interlayer, the first wiring structures being spaced apart from each other, a plurality of second wiring structures filling a plurality of trenches on the second insulating interlayer, respectively, an insulation capping structure selectively on a surface of the first insulating interlayer between the first wiring structures and on a sidewall and an upper surface of each of the first wiring structures, the insulation capping structure including an insulating material, a third insulating interlayer on the first and second wiring structures, and an air gap among the first wiring structures under the third insulating interlayer.

公开(公告)号：US20180102280A1

公开(公告)日：2018-04-12

申请号：US15636889

申请日：2017-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Viet Ha NGUYEN ,  Nae In LEE ,  Thomas OSZINDA ,  Byung Hee KIM ,  Jong Min BAEK ,  Tae Jin YIM

IPC: H01L21/768

CPC classification number: H01L21/76826 ,  H01L21/76814 ,  H01L21/76877 ,  H01L21/76888

Abstract: Methods for fabricating semiconductor devices may provide enhanced performance and reliability by recovering quality of a low-k insulating film damaged by a plasma process. A method may include forming a first interlayer insulating film having a trench therein on a substrate, filling at least a portion of the trench with a metal wiring region, exposing a surface of the metal wiring region and a surface of the first interlayer insulating film to a plasma in a first surface treatment process, then exposing the surface of the first interlayer insulating film to a recovery gas containing a methyl group (—CH3) in a second surface treatment process, and then forming an etch stop layer on the metal wiring region and the first interlayer insulating film.

公开(公告)号：US20180096880A1

公开(公告)日：2018-04-05

申请号：US15612102

申请日：2017-06-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyu Hee HAN ,  Jong Min BAEK ,  Viet Ha NGUYEN ,  Woo Kyung YOU ,  Sang Shin JANG ,  Byung Hee KIM

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/528 ,  H01L21/311

CPC classification number: H01L21/7682 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/76826 ,  H01L21/76834 ,  H01L21/76849 ,  H01L23/5222 ,  H01L23/5283 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295

Abstract: A semiconductor device includes a first interlayer dielectric film on a substrate, first and second wires respectively extending in a first direction within the first interlayer dielectric film, the first and second wires being adjacent to each other in a second direction different from the first direction, a hard mask pattern on the first interlayer dielectric film, the hard mask pattern including an opening, and an air gap within the first interlayer dielectric film, the air gap including a first portion overlapping vertically with the opening and a second portion not overlapping with the opening in the first direction.