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    DISPLAY DRIVING CIRCUIT AND A DISPLAY DEVICE HAVING THE SAME
    2.
    发明申请
    DISPLAY DRIVING CIRCUIT AND A DISPLAY DEVICE HAVING THE SAME 有权
    显示驱动电路和具有该显示驱动电路的显示器件

    公开(公告)号：US20150262543A1

    公开(公告)日：2015-09-17

    申请号：US14550312

    申请日：2014-11-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jong-Kon Bae ,  Won-Sik Kang ,  Yang-Hyo Kim ,  Jae-Hyuck Woo

    IPC: G09G5/00

    CPC classification number: G09G5/001 ,  G09G3/20 ,  G09G5/006 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2330/023 ,  G09G2330/06 ,  G09G2370/08

    Abstract: A display driving circuit includes first through (2*n)-th buffers, a buffer controller, first through n-th image processing units, and a source driver. The buffer controller circularly selects one of the first through (2*n)-th buffers in an order from the first buffer to the (2*n)-th buffer at each of a plurality of first time intervals, and stores pixel data received during the first time interval in the selected buffer. Each of the first through n-th image processing units is coupled to two corresponding buffers among the first through (2*n)-th buffers, and processes the pixel data, which are stored in at least one of their corresponding buffers, during n of the first time intervals to generate processed data when the pixel data are stored in the corresponding buffer during the first time interval. The source driver generates analog signals based on the processed data.

    Abstract translation: 显示驱动电路包括第一到第（2×n）个缓冲器，缓冲器控制器，第一至第n图像处理单元和源极驱动器。 缓冲器控制器在多个第一时间间隔中的每一个处以从第一缓冲器到第（2×n）个缓冲器的顺序循环选择第一至第（2×n）个缓冲器中的一个，并存储接收到的像素数据 在所选缓冲区的第一个时间间隔内。 第一至第n图像处理单元中的每一个耦合到第一至第（2×n）个缓冲器中的两个对应的缓冲器，并且处理存储在其相应缓冲器中的至少一个中的像素数据，在n 的第一时间间隔以在第一时间间隔期间将像素数据存储在相应的缓冲器中时产生处理的数据。 源驱动器基于处理的数据生成模拟信号。

    PANEL DRIVING CIRCUIT THAT GENERATES PANEL TEST PATTERN AND PANEL TEST METHOD THEREOF
    4.
    发明申请
    PANEL DRIVING CIRCUIT THAT GENERATES PANEL TEST PATTERN AND PANEL TEST METHOD THEREOF 有权
    生成面板测试图案的面板驱动电路及其面板测试方法

    公开(公告)号：US20140089753A1

    公开(公告)日：2014-03-27

    申请号：US14094195

    申请日：2013-12-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Won-Sik Kang ,  Jae-Goo Lee

    IPC: G01R31/3183

    CPC classification number: G01R31/318378 ,  G09G3/006 ,  G09G3/3611 ,  G09G3/3648 ,  G09G5/006 ,  G09G2330/02 ,  G09G2340/125 ,  H04N5/06 ,  H04N17/04

    Abstract: A panel driving circuit that produces a panel test pattern and a method of testing a panel are provided. The driving circuit includes a pattern generation unit and a selection unit. The pattern generation unit responds to a system clock and produces pattern test data and pattern test signals. The selection unit responds to a test signal and selects and outputs either (a) the pattern test data and the pattern test signals that are outputted from the pattern generation unit, or (b) the pattern test data and pattern test signals that are directly applied from the outside. The driving circuit and the method of the panel test generates the panel test data, the horizontal synchronizing signal, the vertical synchronizing signal, and the data activating signal within the driving circuit using a system clock so that the testing of the panel can be carried out without using a separate test device.

    Abstract translation: 提供了产生面板测试图案的面板驱动电路和测试面板的方法。 驱动电路包括图案生成单元和选择单元。 图案生成单元响应系统时钟并产生模式测试数据和模式测试信号。 选择单元响应于测试信号，并且选择并输出（a）从模式生成单元输出的模式测试数据和模式测试信号，或者（b）直接应用的模式测试数据和模式测试信号 从外部。 驱动电路和面板测试方法使用系统时钟产生驱动电路内的面板测试数据，水平同步信号，垂直同步信号和数据激活信号，从而可以执行面板的测试 而不使用单独的测试设备。

    Display driving circuit and a display device having the same
    5.
    发明授权
    Display driving circuit and a display device having the same 有权
    显示驱动电路及具有该驱动电路的显示装置

    公开(公告)号：US09552791B2

    公开(公告)日：2017-01-24

    申请号：US14550312

    申请日：2014-11-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jong-Kon Bae ,  Won-Sik Kang ,  Yang-Hyo Kim ,  Jae-Hyuck Woo

    IPC: G09G5/00 ,  G09G3/20

    CPC classification number: G09G5/001 ,  G09G3/20 ,  G09G5/006 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2330/023 ,  G09G2330/06 ,  G09G2370/08

    Abstract: A display driving circuit includes first through (2*n)-th buffers, a buffer controller, first through n-th image processing units, and a source driver. The buffer controller circularly selects one of the first through (2*n)-th buffers in an order from the first buffer to the (2*n)-th buffer at each of a plurality of first time intervals, and stores pixel data received during the first time interval in the selected buffer. Each of the first through n-th image processing units is coupled to two corresponding buffers among the first through (2*n)-th buffers, and processes the pixel data, which are stored in at least one of their corresponding buffers, during n of the first time intervals to generate processed data when the pixel data are stored in the corresponding buffer during the first time interval. The source driver generates analog signals based on the processed data.

    Abstract translation: 显示驱动电路包括第一到第（2×n）个缓冲器，缓冲器控制器，第一至第n图像处理单元和源极驱动器。 缓冲器控制器在多个第一时间间隔中的每一个处以从第一缓冲器到第（2×n）个缓冲器的顺序循环选择第一至第（2×n）个缓冲器中的一个，并存储接收的像素数据 在所选缓冲区的第一个时间间隔内。 第一至第n图像处理单元中的每一个耦合到第一至第（2×n）个缓冲器中的两个对应的缓冲器，并且处理存储在其相应缓冲器中的至少一个中的像素数据，在n 的第一时间间隔以在第一时间间隔期间将像素数据存储在相应的缓冲器中时产生处理的数据。 源驱动器基于处理的数据生成模拟信号。

    Methods and apparatus for latch-up free boosting
    6.
    发明授权
    Methods and apparatus for latch-up free boosting 有权
    用于闭锁自由增压的方法和装置

    公开(公告)号：US09129580B2

    公开(公告)日：2015-09-08

    申请号：US14316179

    申请日：2014-06-26

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jae-Ho Park ,  Won-Sik Kang

    IPC: G09G5/00 ,  G09G3/36 ,  H02M3/07 ,  G02F1/133 ,  H02M1/00

    CPC classification number: G09G3/3696 ,  G02F1/13306 ,  G09G3/3648 ,  G09G2330/02 ,  G09G2330/04 ,  H02M3/07 ,  H02M2001/009

    Abstract: A voltage generator includes a boosting circuit boosting a power voltage to generate first through fourth voltages, and a boosting controller controlling the boosting circuit. The boosting controller sets the third and fourth voltages to a voltage level lower than that of a ground voltage while the first and second voltages are generated, so that a plurality of voltages may be stably generated, i.e., without latch-up.

    Abstract translation: 电压发生器包括升压电路，以提高电源电压以产生第一到第四电压，以及升压控制器控制升压电路。 在产生第一和第二电压的同时，升压控制器将第三和第四电压设置为低于接地电压的电压电平，使得可以稳定地产生多个电压，即不锁定。

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