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    DISPLAY DRIVING CIRCUIT AND A DISPLAY DEVICE HAVING THE SAME
    2.
    发明申请
    DISPLAY DRIVING CIRCUIT AND A DISPLAY DEVICE HAVING THE SAME 有权
    显示驱动电路和具有该显示驱动电路的显示器件

    公开(公告)号：US20150262543A1

    公开(公告)日：2015-09-17

    申请号：US14550312

    申请日：2014-11-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jong-Kon Bae ,  Won-Sik Kang ,  Yang-Hyo Kim ,  Jae-Hyuck Woo

    IPC: G09G5/00

    CPC classification number: G09G5/001 ,  G09G3/20 ,  G09G5/006 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2330/023 ,  G09G2330/06 ,  G09G2370/08

    Abstract: A display driving circuit includes first through (2*n)-th buffers, a buffer controller, first through n-th image processing units, and a source driver. The buffer controller circularly selects one of the first through (2*n)-th buffers in an order from the first buffer to the (2*n)-th buffer at each of a plurality of first time intervals, and stores pixel data received during the first time interval in the selected buffer. Each of the first through n-th image processing units is coupled to two corresponding buffers among the first through (2*n)-th buffers, and processes the pixel data, which are stored in at least one of their corresponding buffers, during n of the first time intervals to generate processed data when the pixel data are stored in the corresponding buffer during the first time interval. The source driver generates analog signals based on the processed data.

    Abstract translation: 显示驱动电路包括第一到第（2×n）个缓冲器，缓冲器控制器，第一至第n图像处理单元和源极驱动器。 缓冲器控制器在多个第一时间间隔中的每一个处以从第一缓冲器到第（2×n）个缓冲器的顺序循环选择第一至第（2×n）个缓冲器中的一个，并存储接收到的像素数据 在所选缓冲区的第一个时间间隔内。 第一至第n图像处理单元中的每一个耦合到第一至第（2×n）个缓冲器中的两个对应的缓冲器，并且处理存储在其相应缓冲器中的至少一个中的像素数据，在n 的第一时间间隔以在第一时间间隔期间将像素数据存储在相应的缓冲器中时产生处理的数据。 源驱动器基于处理的数据生成模拟信号。

    Display driving circuit and a display device having the same
    3.
    发明授权
    Display driving circuit and a display device having the same 有权
    显示驱动电路及具有该驱动电路的显示装置

    公开(公告)号：US09552791B2

    公开(公告)日：2017-01-24

    申请号：US14550312

    申请日：2014-11-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jong-Kon Bae ,  Won-Sik Kang ,  Yang-Hyo Kim ,  Jae-Hyuck Woo

    IPC: G09G5/00 ,  G09G3/20

    CPC classification number: G09G5/001 ,  G09G3/20 ,  G09G5/006 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2330/023 ,  G09G2330/06 ,  G09G2370/08

    Abstract: A display driving circuit includes first through (2*n)-th buffers, a buffer controller, first through n-th image processing units, and a source driver. The buffer controller circularly selects one of the first through (2*n)-th buffers in an order from the first buffer to the (2*n)-th buffer at each of a plurality of first time intervals, and stores pixel data received during the first time interval in the selected buffer. Each of the first through n-th image processing units is coupled to two corresponding buffers among the first through (2*n)-th buffers, and processes the pixel data, which are stored in at least one of their corresponding buffers, during n of the first time intervals to generate processed data when the pixel data are stored in the corresponding buffer during the first time interval. The source driver generates analog signals based on the processed data.

    Abstract translation: 显示驱动电路包括第一到第（2×n）个缓冲器，缓冲器控制器，第一至第n图像处理单元和源极驱动器。 缓冲器控制器在多个第一时间间隔中的每一个处以从第一缓冲器到第（2×n）个缓冲器的顺序循环选择第一至第（2×n）个缓冲器中的一个，并存储接收的像素数据 在所选缓冲区的第一个时间间隔内。 第一至第n图像处理单元中的每一个耦合到第一至第（2×n）个缓冲器中的两个对应的缓冲器，并且处理存储在其相应缓冲器中的至少一个中的像素数据，在n 的第一时间间隔以在第一时间间隔期间将像素数据存储在相应的缓冲器中时产生处理的数据。 源驱动器基于处理的数据生成模拟信号。

    Gradation voltage generator and display driving apparatus
    4.
    发明授权
    Gradation voltage generator and display driving apparatus 有权

    公开(公告)号：US09530357B2

    公开(公告)日：2016-12-27

    申请号：US14835128

    申请日：2015-08-25

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： In-Suk Kim ,  Byung-Hun Han ,  Jae-Hyuck Woo

    IPC: G09G1/00 ,  G09G3/32

    CPC classification number: G09G3/3291 ,  G09G3/3208 ,  G09G3/3225 ,  G09G2310/027 ,  G09G2320/043 ,  G09G2320/0673 ,  G09G2330/028

    Abstract: A gradation voltage generator for applying a gradation voltage according to gamma characteristics of a display panel includes a reference gamma selector that receives a maximum reference voltage, a minimum reference voltage, and a first reference voltage, and selects and outputs a maximum gamma voltage and a minimum gamma voltage from among voltages between the maximum reference voltage and the minimum reference voltage, wherein when the maximum reference voltage changes, the minimum gamma voltage is compensated by a difference the changed maximum reference voltage and the first reference voltage and a gamma curve controller that receives the maximum gamma voltage and the minimum gamma voltage, and generates and outputs a plurality of gradation voltages.

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