公开(公告)号：US09389676B2

公开(公告)日：2016-07-12

申请号：US14730561

申请日：2015-06-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： WooSeong Cheong

IPC: G06F1/00 ,  G06F1/32 ,  G06F1/26

CPC classification number: G06F1/3293 ,  G06F1/266 ,  G06F1/3253 ,  G06F1/3256 ,  G06F1/3268 ,  G06F1/3281 ,  G06F1/3296 ,  Y02D10/154 ,  Y02D10/1542 ,  Y02D50/20

Abstract: At least one example embodiment discloses a method of managing a power between a host serial advanced technology attachment (SATA) interface and a device SATA interface. The method includes first requesting to enter one of power saving states, defined by a SATA protocol, and second requesting to enter a deep power saving state if one of the host SATA interface and the device SATA interface operates at the first requested power saving state. The first requesting to enter one of power saving states and the second requesting to enter a deep power saving state are performed by one of the host SATA interface and the device SATA interface.

Abstract translation: 至少一个示例性实施例公开了一种管理主机串行高级技术附件（SATA）接口和设备SATA接口之间的电源的方法。 该方法包括首先请求进入由SATA协议定义的功率节省状态之一，如果主机SATA接口和设备SATA接口中的一个操作在第一请求省电状态，则第二请求进入深度省电状态。 第一个请求进入省电状态之一，第二个请求进入深度省电状态由主机SATA接口和设备SATA接口之一执行。

公开(公告)号：US10754800B2

公开(公告)日：2020-08-25

申请号：US16181813

申请日：2018-11-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： WooSeong Cheong ,  Seonghoon Woo

IPC: G06F13/16 ,  G06F13/42 ,  G06F12/02

Abstract: A storage device includes a controller and a nonvolatile memory device. The controller includes a field programmable gate array (FPGA) and receives an FPGA image for updating the FPGA from an outside in response to a first command received from the outside. The nonvolatile memory device stores the FPGA image. The controller receives the FPGA image through a main interface or a sideband interface, and executes the FPGA image in response to a second command received from the outside.

公开(公告)号：US20190155767A1

公开(公告)日：2019-05-23

申请号：US16181813

申请日：2018-11-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： WooSeong Cheong ,  Seonghoon WOO

IPC: G06F13/16 ,  G06F13/42 ,  G06F12/02

Abstract: A storage device includes a controller and a nonvolatile memory device. The controller includes a field programmable gate array (FPGA) and receives an FPGA image for updating the FPGA from an outside in response to a first command received from the outside. The nonvolatile memory device stores the FPGA image. The controller receives the FPGA image through a main interface or a sideband interface, and executes the FPGA image in response to a second command received from the outside.

公开(公告)号：US09377846B2

公开(公告)日：2016-06-28

申请号：US14460788

申请日：2014-08-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： WooSeong Cheong

IPC: G06F1/32 ,  G06F1/00 ,  H03K5/22 ,  G06F1/26

CPC classification number: G06F1/3293 ,  G06F1/266 ,  G06F1/3253 ,  G06F1/3256 ,  G06F1/3268 ,  G06F1/3281 ,  G06F1/3296 ,  Y02D10/154 ,  Y02D10/1542 ,  Y02D50/20

Abstract: At least one example embodiment discloses a method of managing a power between a host serial advanced technology attachment (SATA) interface and a device SATA interface. The method includes first requesting to enter one of power saving states, defined by a SATA protocol, and second requesting to enter a deep power saving state if one of the host SATA interface and the device SATA interface operates at the first requested power saving state. The first requesting to enter one of power saving states and the second requesting to enter a deep power saving state are performed by one of the host SATA interface and the device SATA interface.