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1.发明申请公开(公告)号：US20160344540A1
公开(公告)日：2016-11-24
申请号：US14720568
申请日：2015-05-22
Applicant: Seagate Technology LLC
Inventor： Belkacem Derras , Raman Venkataramani , William Michael Radich
IPC: H04L7/04 , H04L7/027 , H04L27/227
CPC classification number: H04L7/048 , G11B20/10009 , H04L7/0029 , H04L7/0062 , H04L7/027 , H04L25/03 , H04L27/2271
Abstract: A digitized signal is processed via an interpolator. The interpolator performs timing adjustment on the digitized signal. The error signal is determined based on a desired signal and the time-adjusted digitized signal. A corrective phase shift of the digitized signal is determined via a least-mean-squared processing block that uses the error and the derivative of a function used by the interpolator. The corrective phase shift is input to the interpolator to perform the timing adjustment.
Abstract translation: 通过内插器处理数字化信号。 内插器对数字化信号执行定时调整。 误差信号根据期望的信号和时间调整的数字化信号确定。 数字化信号的校正相移通过使用误差的内插器所使用的函数的导数的最小均方处理块来确定。 校正相移被输入到内插器以执行定时调整。
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2.发明申请公开(公告)号：US20150003221A1
公开(公告)日：2015-01-01
申请号：US13931274
申请日：2013-06-28
Applicant: Seagate Technology LLC
Inventor： Sundararajan Sankaranarayanan , Raman Venkataramani , Rishi Ahuja
CPC classification number: G11B20/10046 , G11B13/045 , G11B20/10222
Abstract: Apparatus and method for recovering data from a multi-channel input signal, such as but not limited to a readback signal from a bit patterned medium (BPM) having a plurality of subtracks. In accordance with some embodiments, a single input single output (SISO) equalizer is adapted to generate equalized outputs responsive to alternating subchannels of the multi-channel input signal. A detector is adapted to generate estimates of data symbols represented by the input signal responsive to the equalized outputs. A switching circuit is adapted to switch in different equalizer coefficients for use by the SISO equalizer for each of the alternating subchannels in the input signal.
Abstract translation: 用于从多通道输入信号恢复数据的装置和方法，例如但不限于具有多个子轨道的位图形介质（BPM）的回读信号。 根据一些实施例，单输入单输出（SISO）均衡器适于产生响应于多通道输入信号的交替子信道的均衡输出。 检测器适于响应于均衡的输出而产生由输入信号表示的数据符号的估计。 开关电路适于切换不同的均衡器系数，供SISO均衡器用于输入信号中的每个交替子信道。
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3.发明授权公开(公告)号：US11949435B2
公开(公告)日：2024-04-02
申请号：US17475552
申请日：2021-09-15
Applicant: Seagate Technology LLC
Inventor： William M. Radich , Raman Venkataramani , Jason Bellorado , Marcus Marrow , Zheng Wang
CPC classification number: H03M13/4138 , G06N7/01 , H03M13/01 , H03M13/3961 , H03M13/45
Abstract: A cyclo-stationary characteristic of a communications channel and/or storage media is determined. The cyclo-stationary characteristic has K-cycles, K>1. Markov transition probabilities are determined that depend on a discrete phase ϕ=t mod K, wherein t is a discrete time value. An encoder to optimize the Markov transition probabilities for encoding data sent through the communications channel and/or stored on the storage media. The optimized Markov transition probabilities are used to decode the data from the communication channel and/or read from the storage media.
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公开(公告)号：US09830942B1
公开(公告)日：2017-11-28
申请号：US15233298
申请日：2016-08-10
Applicant: Seagate Technology LLC
Inventor： Drew Michael Mader , Jason Charles Jury , Tim Rausch , Raman Venkataramani
CPC classification number: G11B20/10481 , G11B20/10009 , G11B20/10194 , G11B20/1407 , G11B20/1426 , G11B2005/0021
Abstract: First and second different write precompensation values are associated with different first and second non-return-to-zero, inverted (NRZI) data patterns. The first and second different write precompensation values cause a predetermined phase shift to be written into test data that comprises the first and second NRZI data patterns. The test data is mitten to a recording medium of a storage device using the first and second write precompensation value. The test data is used to determine a response of the storage device to the predetermined phase shift.
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5.发明授权公开(公告)号：US09165597B2
公开(公告)日：2015-10-20
申请号：US13931274
申请日：2013-06-28
Applicant: Seagate Technology LLC
Inventor： Sundararajan Sankaranarayanan , Raman Venkataramani , Rishi Ahuja
CPC classification number: G11B20/10046 , G11B13/045 , G11B20/10222
Abstract: Apparatus and method for recovering data from a multi-channel input signal, such as but not limited to a readback signal from a bit patterned medium (BPM) having a plurality of subtracks. In accordance with some embodiments, a single input single output (SISO) equalizer is adapted to generate equalized outputs responsive to alternating subchannels of the multi-channel input signal. A detector is adapted to generate estimates of data symbols represented by the input signal responsive to the equalized outputs. A switching circuit is adapted to switch in different equalizer coefficients for use by the SISO equalizer for each of the alternating subchannels in the input signal.
Abstract translation: 用于从多通道输入信号恢复数据的装置和方法，例如但不限于具有多个子轨道的位图形介质（BPM）的回读信号。 根据一些实施例，单输入单输出（SISO）均衡器适于产生响应于多通道输入信号的交替子信道的均衡输出。 检测器适于响应于均衡的输出而产生由输入信号表示的数据符号的估计。 开关电路适于切换不同的均衡器系数，供SISO均衡器用于输入信号中的每个交替子信道。
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Patent Agency Ranking
公开(公告)号：US11493499B1
公开(公告)日：2022-11-08
申请号：US16175223
申请日：2018-10-30
Applicant: Seagate Technology LLC
Inventor： Raman Venkataramani , William Radich
IPC: G01N27/447 , G01N27/327 , G01N33/487 , B82Y15/00 , G06K9/62
Abstract: Systems and methods are disclosed for performing event timing detection for DNA sequencing. In certain embodiments, a method may comprise generating a signal based on a DNA strand passed through a nanopore sensor, sampling the signal to generate a plurality of sample values, and detecting one or more event boundaries based on the sample values, an event representing a movement of a single DNA base of the DNA strand through the nanopore sensor. Detecting the one or more event boundaries may include segmenting the plurality of sample values into multiple events to calculate an optimal total score, assigning an event value to a selected event from the multiple events based on sample values of the selected event, and providing the event value to a base caller to determine a sequence of DNA bases.
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公开(公告)号：US10447315B2
公开(公告)日：2019-10-15
申请号：US15677304
申请日：2017-08-15
Applicant: Seagate Technology LLC
Inventor： Raman Venkataramani
Abstract: In one embodiment, a system provides for optimizing an error rate of data through a communication channel. The system includes a data generator operable to generate a training sequence as a Markov code, and to propagate the training sequence through the communication channel. The system also includes a Soft Output Viterbi Algorithm (SOVA) detector operable to estimate data values of the training sequence after propagation through the communication channel. The system also includes an optimizer operable to compare the estimated data values to the generated training sequence, to determine an error rate based on the comparison, and to change the training sequence based on the Markov code to lower the error rate of the data through the communication channel.
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公开(公告)号：US20230212666A1
公开(公告)日：2023-07-06
申请号：US17565696
申请日：2021-12-30
Applicant: Seagate Technology LLC
Inventor： Raman Venkataramani , William M. Radich , Jason Bellorado
IPC: C12Q1/6874 , G16B30/10
CPC classification number: C12Q1/6874 , G16B30/10
Abstract: Systems and methods are disclosed for performing segmentation and labeling of signals generated by single molecule sequencing. In certain embodiments, a method may comprise receiving a training signal generated by molecular detection, segmenting the training signal into a set of events, determining signal characteristics for the set of events, generating a Hidden Markov Model (HMM) based on the set of events and the signal characteristics. The HMM may also be applied to a second signal and may responsively segment the second signal into a second set of events and label the second set of events based on the signal characteristics. A labeled sequence signal output may be provided that includes the second set of events and corresponding labels generated by the HMM.
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公开(公告)号：US09947362B1
公开(公告)日：2018-04-17
申请号：US15193050
申请日：2016-06-25
Applicant: Seagate Technology LLC
Inventor： Raman Venkataramani , Belkacem Derras , William Michael Radich
CPC classification number: G06F17/17 , G11B20/10046
Abstract: A system may include an interpolator circuit configured to receive a first signal with a first rate and to generate an interpolated signal with a second rate. The system may include a cancellation circuit configured to determine an interference component signal based on the interpolated signal. The system may further comprise an adder configured to receive a second signal with the second rate and to cancel interference in the second signal using the interference component signal to generate a cleaned signal.
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公开(公告)号：US20190058494A1
公开(公告)日：2019-02-21
申请号：US15677304
申请日：2017-08-15
Applicant: Seagate Technology LLC
Inventor： Raman Venkataramani
Abstract: In one embodiment, a system provides for optimizing an error rate of data through a communication channel. The system includes a data generator operable to generate a training sequence as a Markov code, and to propagate the training sequence through the communication channel. The system also includes a Soft Output Viterbi Algorithm (SOVA) detector operable to estimate data values of the training sequence after propagation through the communication channel. The system also includes an optimizer operable to compare the estimated data values to the generated training sequence, to determine an error rate based on the comparison, and to change the training sequence based on the Markov code to lower the error rate of the data through the communication channel.
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