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    Fast transversal multi-input system
    1.
    发明授权
    Fast transversal multi-input system 有权
    快速横向多输入系统

    公开(公告)号：US09407472B1

    公开(公告)日：2016-08-02

    申请号：US14308461

    申请日：2014-06-18

    Applicant: Seagate Technology LLC

    Inventor： Belkacem Derras ,  William Michael Radich ,  Rishi Ahuja

    IPC: H03H7/30 ,  H04L25/03

    CPC classification number: H04L25/03891 ,  H04L25/03019 ,  H04L2025/03426 ,  H04L2025/03649

    Abstract: Multiple input single output (MISO) systems and processes are presented that can adaptively equalize multiple signals to produce an output. In some examples, the MISO systems can include a fast transversal recursive least square (RLS) algorithm to produce the output. Fast transversal RLS algorithms can be less complex than other RLS algorithms. In some examples, the fast transversal RLS algorithm may be optimized to have no division operations. The MISO system may have two or more inputs.

    Abstract translation: 提出了多输入单输出（MISO）系统和过程，其可以自适应地均衡多个信号以产生输出。 在一些示例中，MISO系统可以包括快速的横向递归最小二乘法（RLS）算法来产生输出。 快速横向RLS算法可能不如其他RLS算法复杂。 在一些示例中，快速横向RLS算法可以被优化为不具有除法运算。 MISO系统可以具有两个或更多个输入。

    Channel parameter recovery
    2.
    发明授权
    Channel parameter recovery 有权

    公开(公告)号：US09985807B1

    公开(公告)日：2018-05-29

    申请号：US15194802

    申请日：2016-06-28

    Applicant: Seagate Technology LLC

    Inventor： William Michael Radich ,  Rishi Ahuja

    IPC: H03H7/40 ,  H04L25/03

    CPC classification number: H04L25/03891

    Abstract: A system may comprise a finite impulse response circuit configured to receive one or more samples of a first signal and generate an equalized signal based on the plurality of samples of the input signal and one or more updatable tap coefficients. The system may include an adaptation circuit configured to update the one or more updatable tap coefficients based on the plurality of samples of the input signal. The system may further comprise a recovery circuit configured to accumulate one or more retuning values based on the plurality of samples of the input signal and, in response to an error condition, generate one or more retuned tap coefficients for the finite impulse response circuit based on the one or more retuning values and replace the one or more updatable parameters with the one or more retuned parameters.

    Self-adapting phase-locked loop filter for use in a read channel
    7.
    发明授权
    Self-adapting phase-locked loop filter for use in a read channel 有权
    用于读通道的自适应锁相环滤波器

    公开(公告)号：US09525576B1

    公开(公告)日：2016-12-20

    申请号：US14808736

    申请日：2015-07-24

    Applicant: Seagate Technology LLC

    Inventor： Ara Patapoutian ,  Belkacem Derras ,  William Michael Radich ,  Michael J. Link ,  Bruce Douglas Buch

    IPC: H04L27/148 ,  H04L7/033

    CPC classification number: H04L7/033 ,  H03L7/00 ,  H03L7/0807 ,  H03L7/091 ,  H03L7/093 ,  H03L7/107 ,  H04L1/0016 ,  H04L7/0332 ,  H04L27/148 ,  H04L43/16

    Abstract: A phase-locked loop (PLL) filter of a read channel includes a filter portion having an input coupled to delay circuitry having an output. The input of the filter portion is configured to receive a phase error signal. A look-up table is coupled to the filter portion. The look-up table comprises phase coefficients and frequency coefficients associated with a plurality of phase error magnitudes. The look-up table is configured to provide one or both of a selected phase coefficient and a selected frequency coefficient based on a magnitude of the phase error signal. The PLL filter is configured to adjust a bandwidth of the filter portion using one or both of the selected phase coefficient and the selected frequency coefficient. A phase signal indicative of estimated phase disturbance is produced at the output of the delay circuitry.

    Abstract translation: 读通道的锁相环（PLL）滤波器包括具有耦合到具有输出的延迟电路的输入的滤波器部分。 滤波器部分的输入被配置为接收相位误差信号。 查找表连接到过滤器部分。 查找表包括与多个相位误差量值相关联的相位系数和频率系数。 查找表被配置为基于相位误差信号的幅度提供所选择的相位系数和所选择的频率系数中的一个或两个。 PLL滤波器被配置为使用选择的相位系数和所选频率系数中的一个或两个来调整滤波器部分的带宽。 在延迟电路的输出处产生指示估计相位扰动的相位信号。

    DETECTING TRACK INFORMATION FROM OVERLAPPING SIGNALS READ FROM A DATA STORAGE MEDIUM
    9.
    发明申请
    DETECTING TRACK INFORMATION FROM OVERLAPPING SIGNALS READ FROM A DATA STORAGE MEDIUM 有权
    从数据存储介质中读取重写信号中的跟踪信息

    公开(公告)号：US20140160590A1

    公开(公告)日：2014-06-12

    申请号：US13712913

    申请日：2012-12-12

    Applicant: SEAGATE TECHNOLOGY LLC

    Inventor： Sundararajan Sankaranarayanan ,  Raman Venkataranmani ,  William Michael Radich

    IPC: G11B5/09

    CPC classification number: G11B5/09 ,  G11B5/012 ,  G11B5/02 ,  G11B5/3977 ,  G11B20/10046 ,  G11B20/10212 ,  G11B2020/10953

    Abstract: Detecting track information involves receiving first and second overlapping track signals from first and second read elements that read first and second tracks from a data storage medium. Information of the first and second tracks is estimated using the respective first and second track signals. An improved information estimate of the first track is obtained using the first track signal and the estimated information of the second track, and an improved information estimate of the second track is obtained using the second track signal and the estimated information of the first track. First and second track data are decoded using the respective improved information estimates of the first and second tracks.

    Abstract translation: 检测轨道信息涉及从第一和第二读取元件接收从数据存储介质读取第一和第二轨道的第一和第二重叠轨道信号。 使用相应的第一和第二轨道信号来估计第一和第二轨道的信息。 使用第一轨道信号和第二轨道的估计信息获得第一轨道的改进的信息估计，并且使用第二轨道信号和第一轨道的估计信息来获得第二轨道的改进的信息估计。 第一和第二轨道数据使用第一和第二轨道的相应改进的信息估计被解码。

    TIMING ERROR PROCESSOR THAT USES THE DERIVATIVE OF AN INTERPOLATOR FUNCTION
    10.
    发明申请
    TIMING ERROR PROCESSOR THAT USES THE DERIVATIVE OF AN INTERPOLATOR FUNCTION 有权
    时间误差处理器使用插值函数的衍生物

    公开(公告)号：US20160344540A1

    公开(公告)日：2016-11-24

    申请号：US14720568

    申请日：2015-05-22

    Applicant: Seagate Technology LLC

    Inventor： Belkacem Derras ,  Raman Venkataramani ,  William Michael Radich

    IPC: H04L7/04 ,  H04L7/027 ,  H04L27/227

    CPC classification number: H04L7/048 ,  G11B20/10009 ,  H04L7/0029 ,  H04L7/0062 ,  H04L7/027 ,  H04L25/03 ,  H04L27/2271

    Abstract: A digitized signal is processed via an interpolator. The interpolator performs timing adjustment on the digitized signal. The error signal is determined based on a desired signal and the time-adjusted digitized signal. A corrective phase shift of the digitized signal is determined via a least-mean-squared processing block that uses the error and the derivative of a function used by the interpolator. The corrective phase shift is input to the interpolator to perform the timing adjustment.

    Abstract translation: 通过内插器处理数字化信号。 内插器对数字化信号执行定时调整。 误差信号根据期望的信号和时间调整的数字化信号确定。 数字化信号的校正相移通过使用误差的内插器所使用的函数的导数的最小均方处理块来确定。 校正相移被输入到内插器以执行定时调整。

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