利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

6 条记录 (耗时 0.021 秒)

    Deposited thin film void-column network materials
    1.
    发明授权
    Deposited thin film void-column network materials 有权
    沉积的薄膜空心柱网络材料

    公开(公告)号：US06399177B1

    公开(公告)日：2002-06-04

    申请号：US09580105

    申请日：2000-05-30

    申请人： Stephen J. Fonash ,  Ali Kaan Kalkan ,  Sanghoon Bae

    发明人： Stephen J. Fonash ,  Ali Kaan Kalkan ,  Sanghoon Bae

    IPC分类号： B32B700

    CPC分类号： B81C1/0038 ,  B81C1/00047 ,  B81C2201/0115 ,  B81C2201/0139 ,  B81C2201/018 ,  C23C16/24 ,  C23C16/511 ,  G01N21/17 ,  G01N27/121 ,  G01N27/44717 ,  G01N30/6095 ,  H01J49/0418 ,  Y10T428/24174 ,  Y10T428/249953

    摘要： A novel porous film is disclosed comprising a network of silicon columns in a continuous void which may be fabricated using high density plasma deposition at low temperatures, i.e., less than about 250° C. This silicon film is a two-dimensional nano-sized array of rodlike columns. This void-column morphology can be controlled with deposition conditions and the porosity can be varied up to 90%. The simultaneous use of low temperature deposition and etching in the plasma approach utilized, allows for the unique opportunity of obtaining columnar structure, a continuous void, and polycrystalline column composition at the same time. Unique devices may be fabricated using this porous continuous film by plasma deposition of this film on a glass, metal foil, insulator or plastic substrates.

    摘要翻译： 公开了一种新颖的多孔膜，其包括在连续空隙中的硅柱网络，其可以在低温下（即小于约250℃）下使用高密度等离子体沉积来制造。该硅膜是二维纳米尺寸阵列 的棒状柱。 这种空隙柱形态可以用沉积条件控制，并且孔隙率可以变化高达90％。 在所采用的等离子体方法中同时使用低温沉积和蚀刻允许在同时获得柱状结构，连续空隙和多晶柱组成的独特机会。 可以使用这种多孔连续膜通过将该膜等离子体沉积在玻璃，金属箔，绝缘体或塑料基底上来制造独特的器件。

    Deposited thin films and their use in separation and sacrificial layer applications
    2.
    发明授权
    Deposited thin films and their use in separation and sacrificial layer applications 失效
    沉积的薄膜及其在分离和牺牲层应用中的应用

    公开(公告)号：US07427526B2

    公开(公告)日：2008-09-23

    申请号：US09836449

    申请日：2001-04-17

    申请人： Stephen J. Fonash ,  Wook Jun Nam ,  Youngchul Lee ,  Kyuhwan Chang ,  Daniel J. Hayes ,  A. Kaan Kalkan ,  Sanghoon Bae

    发明人： Stephen J. Fonash ,  Wook Jun Nam ,  Youngchul Lee ,  Kyuhwan Chang ,  Daniel J. Hayes ,  A. Kaan Kalkan ,  Sanghoon Bae

    IPC分类号： H01L21/00

    CPC分类号： B81C1/0038 ,  B81C1/00119 ,  B81C1/00476 ,  B81C2201/0115 ,  G01N21/17 ,  G01N27/44717 ,  Y10T29/49108

    摘要： This invention uses large surface to volume ratio materials for separation, release layer, and sacrificial material applications. The invention outlines the material concept, application designs, and fabrication methodologies. The invention is demonstrated using deposited column/void network materials as examples of large surface to volume ratio materials. In a number of the specific applications discussed, it is shown that it is advantageous to create structures on a laminate on a mother substrate and then, using the separation layer material approach, to separate this laminate from the mother substrate using the present separation scheme. It is also shown that the present materials have excellent release layer utility. In a number of applications it is also shown how the approach can be used to uniquely form cavities, channels, air-gaps, and related structures in or on various substrates. Further, it is demonstrated that it also can be possible and advantageous to combine the schemes for cavity formation with the scheme for laminate separation.

    摘要翻译： 本发明使用大的表面体积比的材料用于分离，剥离层和牺牲材料应用。 本发明概述了材料概念，应用设计和制造方法。 本发明使用沉积柱/空隙网络材料作为大表面积与体积比的材料的实例进行了说明。 在讨论的许多具体应用中，显示了在母基板上的层压体上产生结构，然后使用分离层材料方法，使用本分离方案将该层压体与母基板分离是有利的。 还显示出本发明材料具有优异的脱模层效用。 在许多应用中，还显示了该方法如何用于在各种基底中或其上独特地形成腔，通道，气隙和相关结构。 此外，证明了将空腔形成方案与层压分离方案组合也是有可能和有利的。

    Metal-contact induced crystallization in semiconductor devices
    6.
    发明授权
    Metal-contact induced crystallization in semiconductor devices 有权
    金属接触引起的半导体器件结晶

    公开(公告)号：US06277714B1

    公开(公告)日：2001-08-21

    申请号：US09400496

    申请日：1999-09-21

    申请人： Stephan J. Fonash ,  Sanghoon Bae

    发明人： Stephan J. Fonash ,  Sanghoon Bae

    IPC分类号： H01L2120

    CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/2022 ,  H01L21/2026

    摘要： The method of the invention induces crystallization in an amorphous semiconductor layer, and includes the steps of: a) producing a patterned metal layer on a first substrate, the metal layer exhibiting a weak level of adherence to the first substrate; b) pressing the metal layer into physical contact with the amorphous semiconductor layer; c) applying heat, light or both to the metal layer and amorphous semiconductor layer to cause a reaction therebetween and a crystallization of the amorphous semiconductor that is juxtaposed to the metal.

    摘要翻译： 本发明的方法在非晶半导体层中诱导结晶，并且包括以下步骤：a）在第一衬底上产生图案化金属层，所述金属层对第一衬底表现出弱的粘着水平; b）将所述金属层按压与所述非晶半导体层物理接触; c）向金属层和非晶半导体层施加热，光或两者，以引起其间的反应和与金属并置的非晶半导体的结晶。